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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_uart_ps___config.html">XUartPs_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the device.  <a href="struct_x_uart_ps___config.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_uart_ps_format.html">XUartPsFormat</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Keep track of data format setting of a device.  <a href="struct_x_uart_ps_format.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_uart_ps.html">XUartPs</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> driver instance data structure.  <a href="struct_x_uart_ps.html#details">More...</a><br/></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:ga2f0a6417e12aa122e287fe313c03a399"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga2f0a6417e12aa122e287fe313c03a399">TIMEOUT_VAL</a>&#160;&#160;&#160;1000000U</td></tr>
<tr class="memdesc:ga2f0a6417e12aa122e287fe313c03a399"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wait for 1 sec in worst case.  <a href="#ga2f0a6417e12aa122e287fe313c03a399">More...</a><br/></td></tr>
<tr class="separator:ga2f0a6417e12aa122e287fe313c03a399"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8c50cd4a1f7a342dcdf6d7ab1640b1b9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga8c50cd4a1f7a342dcdf6d7ab1640b1b9">XUartPs_GetChannelStatus</a>(InstancePtr)&#160;&#160;&#160;Xil_In32(((InstancePtr)-&gt;Config.BaseAddress) + (u32)<a class="el" href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a>)</td></tr>
<tr class="memdesc:ga8c50cd4a1f7a342dcdf6d7ab1640b1b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the UART Channel Status Register.  <a href="#ga8c50cd4a1f7a342dcdf6d7ab1640b1b9">More...</a><br/></td></tr>
<tr class="separator:ga8c50cd4a1f7a342dcdf6d7ab1640b1b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacd6fb80e110f22c2d305c3152cbe9e22"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gacd6fb80e110f22c2d305c3152cbe9e22">XUartPs_GetModeControl</a>(InstancePtr)&#160;&#160;&#160;Xil_In32(((InstancePtr)-&gt;Config.BaseAddress) + (u32)<a class="el" href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a>)</td></tr>
<tr class="memdesc:gacd6fb80e110f22c2d305c3152cbe9e22"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the UART Mode Control Register.  <a href="#gacd6fb80e110f22c2d305c3152cbe9e22">More...</a><br/></td></tr>
<tr class="separator:gacd6fb80e110f22c2d305c3152cbe9e22"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabecf07183bbcaa00778bae5eee856818"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gabecf07183bbcaa00778bae5eee856818">XUartPs_SetModeControl</a>(InstancePtr, RegisterValue)</td></tr>
<tr class="memdesc:gabecf07183bbcaa00778bae5eee856818"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the UART Mode Control Register.  <a href="#gabecf07183bbcaa00778bae5eee856818">More...</a><br/></td></tr>
<tr class="separator:gabecf07183bbcaa00778bae5eee856818"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga800f448c280504c1c8e3a0e2cea28699"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga800f448c280504c1c8e3a0e2cea28699">XUartPs_EnableUart</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga800f448c280504c1c8e3a0e2cea28699"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the transmitter and receiver of the UART.  <a href="#ga800f448c280504c1c8e3a0e2cea28699">More...</a><br/></td></tr>
<tr class="separator:ga800f448c280504c1c8e3a0e2cea28699"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa8604eeb6cd5c80a3a54ef5510bd46ff"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaa8604eeb6cd5c80a3a54ef5510bd46ff">XUartPs_DisableUart</a>(InstancePtr)</td></tr>
<tr class="memdesc:gaa8604eeb6cd5c80a3a54ef5510bd46ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the transmitter and receiver of the UART.  <a href="#gaa8604eeb6cd5c80a3a54ef5510bd46ff">More...</a><br/></td></tr>
<tr class="separator:gaa8604eeb6cd5c80a3a54ef5510bd46ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9a3d03d5794a4d8cdda2fa2c4ba8e174"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga9a3d03d5794a4d8cdda2fa2c4ba8e174">XUartPs_IsTransmitEmpty</a>(InstancePtr)</td></tr>
<tr class="memdesc:ga9a3d03d5794a4d8cdda2fa2c4ba8e174"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if the transmitter FIFO is empty.  <a href="#ga9a3d03d5794a4d8cdda2fa2c4ba8e174">More...</a><br/></td></tr>
<tr class="separator:ga9a3d03d5794a4d8cdda2fa2c4ba8e174"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga16be7534dc3d678f8abcfeb87e6a4f7e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>(BaseAddress, RegOffset)&#160;&#160;&#160;Xil_In32((BaseAddress) + (u32)(RegOffset))</td></tr>
<tr class="memdesc:ga16be7534dc3d678f8abcfeb87e6a4f7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read a UART register.  <a href="#ga16be7534dc3d678f8abcfeb87e6a4f7e">More...</a><br/></td></tr>
<tr class="separator:ga16be7534dc3d678f8abcfeb87e6a4f7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab541297d822b163193a2e47305987ab6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>(BaseAddress, RegOffset, RegisterValue)&#160;&#160;&#160;Xil_Out32((BaseAddress) + (u32)(RegOffset), (u32)(RegisterValue))</td></tr>
<tr class="memdesc:gab541297d822b163193a2e47305987ab6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write a UART register.  <a href="#gab541297d822b163193a2e47305987ab6">More...</a><br/></td></tr>
<tr class="separator:gab541297d822b163193a2e47305987ab6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac8b8f06d10cf178227ce88c140d78eb4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gac8b8f06d10cf178227ce88c140d78eb4">XUartPs_IsReceiveData</a>(BaseAddress)</td></tr>
<tr class="memdesc:gac8b8f06d10cf178227ce88c140d78eb4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if there is receive data in the receiver and/or FIFO.  <a href="#gac8b8f06d10cf178227ce88c140d78eb4">More...</a><br/></td></tr>
<tr class="separator:gac8b8f06d10cf178227ce88c140d78eb4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf1507e8d7b12983484a0ab5436a51970"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaf1507e8d7b12983484a0ab5436a51970">XUartPs_IsTransmitFull</a>(BaseAddress)</td></tr>
<tr class="memdesc:gaf1507e8d7b12983484a0ab5436a51970"><td class="mdescLeft">&#160;</td><td class="mdescRight">Determine if a byte of data can be sent with the transmitter.  <a href="#gaf1507e8d7b12983484a0ab5436a51970">More...</a><br/></td></tr>
<tr class="separator:gaf1507e8d7b12983484a0ab5436a51970"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8170a2befa118c8bd2ccc108163c4b7a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga8170a2befa118c8bd2ccc108163c4b7a">XUartPs_IsTransmitFifoEmpty</a>(BaseAddress)</td></tr>
<tr class="memdesc:ga8170a2befa118c8bd2ccc108163c4b7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check if transmission FIFO is empty.  <a href="#ga8170a2befa118c8bd2ccc108163c4b7a">More...</a><br/></td></tr>
<tr class="separator:ga8170a2befa118c8bd2ccc108163c4b7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa34f1217cdc0b14977fbe3a22ec167ee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaa34f1217cdc0b14977fbe3a22ec167ee">XUartPs_IsTransmitActive</a>(BaseAddress)</td></tr>
<tr class="memdesc:gaa34f1217cdc0b14977fbe3a22ec167ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check if transmission state machine is active.  <a href="#gaa34f1217cdc0b14977fbe3a22ec167ee">More...</a><br/></td></tr>
<tr class="separator:gaa34f1217cdc0b14977fbe3a22ec167ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Typedefs</h2></td></tr>
<tr class="memitem:ga5bb8d1f316dacd471a6cd3c976c7b1ca"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga5bb8d1f316dacd471a6cd3c976c7b1ca">XUartPs_Handler</a> )(void *CallBackRef, u32 Event, u32 EventData)</td></tr>
<tr class="memdesc:ga5bb8d1f316dacd471a6cd3c976c7b1ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">This data type defines a handler that an application defines to communicate with interrupt system to retrieve state information about an application.  <a href="#ga5bb8d1f316dacd471a6cd3c976c7b1ca">More...</a><br/></td></tr>
<tr class="separator:ga5bb8d1f316dacd471a6cd3c976c7b1ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga969a172d07d93e0e25851bd35e50ed09"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga969a172d07d93e0e25851bd35e50ed09">Handler</a> )(<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga969a172d07d93e0e25851bd35e50ed09"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the handler which performs processing to handle data events from the device.  <a href="#ga969a172d07d93e0e25851bd35e50ed09">More...</a><br/></td></tr>
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Functions</h2></td></tr>
<tr class="memitem:ga371d525c4d48239a3ce77c44d0a92b05"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, <a class="el" href="struct_x_uart_ps___config.html">XUartPs_Config</a> *Config, u32 EffectiveAddr)</td></tr>
<tr class="memdesc:ga371d525c4d48239a3ce77c44d0a92b05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initializes a specific <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance such that it is ready to be used.  <a href="#ga371d525c4d48239a3ce77c44d0a92b05">More...</a><br/></td></tr>
<tr class="separator:ga371d525c4d48239a3ce77c44d0a92b05"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17b3e12a296eecf17be4a4b8583576e7"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga17b3e12a296eecf17be4a4b8583576e7">XUartPs_Send</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, u8 *BufferPtr, u32 NumBytes)</td></tr>
<tr class="memdesc:ga17b3e12a296eecf17be4a4b8583576e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This functions sends the specified buffer using the device in either polled or interrupt driven mode.  <a href="#ga17b3e12a296eecf17be4a4b8583576e7">More...</a><br/></td></tr>
<tr class="separator:ga17b3e12a296eecf17be4a4b8583576e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadc16932076b99cd747e702dcbecd102b"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gadc16932076b99cd747e702dcbecd102b">XUartPs_Recv</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, u8 *BufferPtr, u32 NumBytes)</td></tr>
<tr class="memdesc:gadc16932076b99cd747e702dcbecd102b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function attempts to receive a specified number of bytes of data from the device and store it into the specified buffer.  <a href="#gadc16932076b99cd747e702dcbecd102b">More...</a><br/></td></tr>
<tr class="separator:gadc16932076b99cd747e702dcbecd102b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d94f913e0494b532c9f442e1bb14dcc"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, u32 BaudRate)</td></tr>
<tr class="memdesc:ga9d94f913e0494b532c9f442e1bb14dcc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the baud rate for the device.  <a href="#ga9d94f913e0494b532c9f442e1bb14dcc">More...</a><br/></td></tr>
<tr class="separator:ga9d94f913e0494b532c9f442e1bb14dcc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaefce314c7582681d7144d3b4f41e72b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_uart_ps___config.html">XUartPs_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaaefce314c7582681d7144d3b4f41e72b">XUartPs_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:gaaefce314c7582681d7144d3b4f41e72b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Looks up the device configuration based on the unique device ID.  <a href="#gaaefce314c7582681d7144d3b4f41e72b">More...</a><br/></td></tr>
<tr class="separator:gaaefce314c7582681d7144d3b4f41e72b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6c7c0ef55459866990d4a17fbb620ba6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga6c7c0ef55459866990d4a17fbb620ba6">XUartPs_SetOptions</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, u16 Options)</td></tr>
<tr class="memdesc:ga6c7c0ef55459866990d4a17fbb620ba6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the options for the specified driver instance.  <a href="#ga6c7c0ef55459866990d4a17fbb620ba6">More...</a><br/></td></tr>
<tr class="separator:ga6c7c0ef55459866990d4a17fbb620ba6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga35d85a106e7af94e903e0795ad94291e"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga35d85a106e7af94e903e0795ad94291e">XUartPs_GetOptions</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga35d85a106e7af94e903e0795ad94291e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the options for the specified driver instance.  <a href="#ga35d85a106e7af94e903e0795ad94291e">More...</a><br/></td></tr>
<tr class="separator:ga35d85a106e7af94e903e0795ad94291e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga515c53f7e66c34da6b18cc7529cc69a5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga515c53f7e66c34da6b18cc7529cc69a5">XUartPs_SetFifoThreshold</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, u8 TriggerLevel)</td></tr>
<tr class="memdesc:ga515c53f7e66c34da6b18cc7529cc69a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">This functions sets the receive FIFO trigger level.  <a href="#ga515c53f7e66c34da6b18cc7529cc69a5">More...</a><br/></td></tr>
<tr class="separator:ga515c53f7e66c34da6b18cc7529cc69a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga61db893485f1c77f27abc6d8a4ff1ed7"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga61db893485f1c77f27abc6d8a4ff1ed7">XUartPs_GetFifoThreshold</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga61db893485f1c77f27abc6d8a4ff1ed7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the receive FIFO trigger level.  <a href="#ga61db893485f1c77f27abc6d8a4ff1ed7">More...</a><br/></td></tr>
<tr class="separator:ga61db893485f1c77f27abc6d8a4ff1ed7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga96641d542ac4708a8e3ed5ca2009e10e"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga96641d542ac4708a8e3ed5ca2009e10e">XUartPs_GetModemStatus</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga96641d542ac4708a8e3ed5ca2009e10e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the modem status from the specified UART.  <a href="#ga96641d542ac4708a8e3ed5ca2009e10e">More...</a><br/></td></tr>
<tr class="separator:ga96641d542ac4708a8e3ed5ca2009e10e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4279fd824eea23f74ad66f165cb0265e"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga4279fd824eea23f74ad66f165cb0265e">XUartPs_IsSending</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga4279fd824eea23f74ad66f165cb0265e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function determines if the specified UART is sending data.  <a href="#ga4279fd824eea23f74ad66f165cb0265e">More...</a><br/></td></tr>
<tr class="separator:ga4279fd824eea23f74ad66f165cb0265e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga67fa9bb06414146652d0ff819bd5852a"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga67fa9bb06414146652d0ff819bd5852a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the operational mode of the UART.  <a href="#ga67fa9bb06414146652d0ff819bd5852a">More...</a><br/></td></tr>
<tr class="separator:ga67fa9bb06414146652d0ff819bd5852a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9c84f5324979f1ba3a9f5a866806d0e8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, u8 OperationMode)</td></tr>
<tr class="memdesc:ga9c84f5324979f1ba3a9f5a866806d0e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the operational mode of the UART.  <a href="#ga9c84f5324979f1ba3a9f5a866806d0e8">More...</a><br/></td></tr>
<tr class="separator:ga9c84f5324979f1ba3a9f5a866806d0e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2127a5ae7ea617f1fb1a3415e35f1387"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga2127a5ae7ea617f1fb1a3415e35f1387">XUartPs_GetFlowDelay</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga2127a5ae7ea617f1fb1a3415e35f1387"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the Flow Delay.  <a href="#ga2127a5ae7ea617f1fb1a3415e35f1387">More...</a><br/></td></tr>
<tr class="separator:ga2127a5ae7ea617f1fb1a3415e35f1387"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0e5c270f7abd4a00f629a638feb2e68e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga0e5c270f7abd4a00f629a638feb2e68e">XUartPs_SetFlowDelay</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, u8 FlowDelayValue)</td></tr>
<tr class="memdesc:ga0e5c270f7abd4a00f629a638feb2e68e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the Flow Delay.  <a href="#ga0e5c270f7abd4a00f629a638feb2e68e">More...</a><br/></td></tr>
<tr class="separator:ga0e5c270f7abd4a00f629a638feb2e68e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa7ea0aca85be0c1eb67ab05de67bc3f"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaaa7ea0aca85be0c1eb67ab05de67bc3f">XUartPs_GetRecvTimeout</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaaa7ea0aca85be0c1eb67ab05de67bc3f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the Receive Timeout of the UART.  <a href="#gaaa7ea0aca85be0c1eb67ab05de67bc3f">More...</a><br/></td></tr>
<tr class="separator:gaaa7ea0aca85be0c1eb67ab05de67bc3f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga75f0201ac3749384f29171565410a8df"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga75f0201ac3749384f29171565410a8df">XUartPs_SetRecvTimeout</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, u8 RecvTimeout)</td></tr>
<tr class="memdesc:ga75f0201ac3749384f29171565410a8df"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the Receive Timeout of the UART.  <a href="#ga75f0201ac3749384f29171565410a8df">More...</a><br/></td></tr>
<tr class="separator:ga75f0201ac3749384f29171565410a8df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga249eaf3cd4be5242d4143a88bab1add0"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, <a class="el" href="struct_x_uart_ps_format.html">XUartPsFormat</a> *FormatPtr)</td></tr>
<tr class="memdesc:ga249eaf3cd4be5242d4143a88bab1add0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the data format for the device.  <a href="#ga249eaf3cd4be5242d4143a88bab1add0">More...</a><br/></td></tr>
<tr class="separator:ga249eaf3cd4be5242d4143a88bab1add0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3de8ab4e4aca0ba939bc547b5592726c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga3de8ab4e4aca0ba939bc547b5592726c">XUartPs_GetDataFormat</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, <a class="el" href="struct_x_uart_ps_format.html">XUartPsFormat</a> *FormatPtr)</td></tr>
<tr class="memdesc:ga3de8ab4e4aca0ba939bc547b5592726c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the data format for the specified UART.  <a href="#ga3de8ab4e4aca0ba939bc547b5592726c">More...</a><br/></td></tr>
<tr class="separator:ga3de8ab4e4aca0ba939bc547b5592726c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae5cf497a416bc210c4f1dbe99cacc961"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gae5cf497a416bc210c4f1dbe99cacc961">XUartPs_GetInterruptMask</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gae5cf497a416bc210c4f1dbe99cacc961"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the interrupt mask.  <a href="#gae5cf497a416bc210c4f1dbe99cacc961">More...</a><br/></td></tr>
<tr class="separator:gae5cf497a416bc210c4f1dbe99cacc961"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab3b65e926f6f4ac7ab41a70801ba12c3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gab3b65e926f6f4ac7ab41a70801ba12c3">XUartPs_SetInterruptMask</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:gab3b65e926f6f4ac7ab41a70801ba12c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the interrupt mask.  <a href="#gab3b65e926f6f4ac7ab41a70801ba12c3">More...</a><br/></td></tr>
<tr class="separator:gab3b65e926f6f4ac7ab41a70801ba12c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf86fb20a58e4a7fbd73afa49f8eb604"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gabf86fb20a58e4a7fbd73afa49f8eb604"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the interrupt handler for the driver.  <a href="#gabf86fb20a58e4a7fbd73afa49f8eb604">More...</a><br/></td></tr>
<tr class="separator:gabf86fb20a58e4a7fbd73afa49f8eb604"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9528098e589491997c7805592a4b5a7b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga9528098e589491997c7805592a4b5a7b">XUartPs_SetHandler</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr, <a class="el" href="group__uartps.html#ga5bb8d1f316dacd471a6cd3c976c7b1ca">XUartPs_Handler</a> FuncPtr, void *CallBackRef)</td></tr>
<tr class="memdesc:ga9528098e589491997c7805592a4b5a7b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the handler that will be called when an event (interrupt) occurs that needs application's attention.  <a href="#ga9528098e589491997c7805592a4b5a7b">More...</a><br/></td></tr>
<tr class="separator:ga9528098e589491997c7805592a4b5a7b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga64e7142d1c69e2e29c9e323c4497baaf"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest</a> (<a class="el" href="struct_x_uart_ps.html">XUartPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga64e7142d1c69e2e29c9e323c4497baaf"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function runs a self-test on the driver and hardware device.  <a href="#ga64e7142d1c69e2e29c9e323c4497baaf">More...</a><br/></td></tr>
<tr class="separator:ga64e7142d1c69e2e29c9e323c4497baaf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4bae0ee4df836a8c3e7748c9ae28ebee"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga4bae0ee4df836a8c3e7748c9ae28ebee">XUartPs_SendByte</a> (u32 BaseAddress, u8 Data)</td></tr>
<tr class="memdesc:ga4bae0ee4df836a8c3e7748c9ae28ebee"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sends one byte using the device.  <a href="#ga4bae0ee4df836a8c3e7748c9ae28ebee">More...</a><br/></td></tr>
<tr class="separator:ga4bae0ee4df836a8c3e7748c9ae28ebee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60240486c69f6167ab13194ced5e8bb7"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga60240486c69f6167ab13194ced5e8bb7">XUartPs_RecvByte</a> (u32 BaseAddress)</td></tr>
<tr class="memdesc:ga60240486c69f6167ab13194ced5e8bb7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function receives a byte from the device.  <a href="#ga60240486c69f6167ab13194ced5e8bb7">More...</a><br/></td></tr>
<tr class="separator:ga60240486c69f6167ab13194ced5e8bb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga157cf5966738452bc13639746f4b8d97"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw</a> (u32 BaseAddress)</td></tr>
<tr class="memdesc:ga157cf5966738452bc13639746f4b8d97"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function resets UART.  <a href="#ga157cf5966738452bc13639746f4b8d97">More...</a><br/></td></tr>
<tr class="separator:ga157cf5966738452bc13639746f4b8d97"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf789b78ee831825f3131f9a016e15044"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaf789b78ee831825f3131f9a016e15044">XUartPs_WaitTransmitDone</a> (u32 BaseAddress)</td></tr>
<tr class="memdesc:gaf789b78ee831825f3131f9a016e15044"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function waits for transmission to complete.  <a href="#gaf789b78ee831825f3131f9a016e15044">More...</a><br/></td></tr>
<tr class="separator:gaf789b78ee831825f3131f9a016e15044"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
Variables</h2></td></tr>
<tr class="memitem:ga371812b0c1dbfd7292ea4788b8311e39"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_uart_ps___config.html">XUartPs_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga371812b0c1dbfd7292ea4788b8311e39">XUartPs_ConfigTable</a> [XPAR_XUARTPS_NUM_INSTANCES]</td></tr>
<tr class="memdesc:ga371812b0c1dbfd7292ea4788b8311e39"><td class="mdescLeft">&#160;</td><td class="mdescRight">Each <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> device in the system has an entry in this table.  <a href="#ga371812b0c1dbfd7292ea4788b8311e39">More...</a><br/></td></tr>
<tr class="separator:ga371812b0c1dbfd7292ea4788b8311e39"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga371812b0c1dbfd7292ea4788b8311e39"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_uart_ps___config.html">XUartPs_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga371812b0c1dbfd7292ea4788b8311e39">XUartPs_ConfigTable</a> [XPAR_XUARTPS_NUM_INSTANCES]</td></tr>
<tr class="memdesc:ga371812b0c1dbfd7292ea4788b8311e39"><td class="mdescLeft">&#160;</td><td class="mdescRight">Each <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> device in the system has an entry in this table.  <a href="#ga371812b0c1dbfd7292ea4788b8311e39">More...</a><br/></td></tr>
<tr class="separator:ga371812b0c1dbfd7292ea4788b8311e39"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Configuration options</h2></td></tr>
<tr class="memitem:ga5073a0aa7bef53cb44206fa6146b9a86"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga5073a0aa7bef53cb44206fa6146b9a86">XUARTPS_OPTION_SET_BREAK</a>&#160;&#160;&#160;0x0080U</td></tr>
<tr class="memdesc:ga5073a0aa7bef53cb44206fa6146b9a86"><td class="mdescLeft">&#160;</td><td class="mdescRight">These constants specify the options that may be set or retrieved with the driver, each is a unique bit mask such that multiple options may be specified.  <a href="#ga5073a0aa7bef53cb44206fa6146b9a86">More...</a><br/></td></tr>
<tr class="separator:ga5073a0aa7bef53cb44206fa6146b9a86"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga15a737d7e5baf7a08693aed5599f49c3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga15a737d7e5baf7a08693aed5599f49c3">XUARTPS_OPTION_STOP_BREAK</a>&#160;&#160;&#160;0x0040U</td></tr>
<tr class="memdesc:ga15a737d7e5baf7a08693aed5599f49c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stops break transmission.  <a href="#ga15a737d7e5baf7a08693aed5599f49c3">More...</a><br/></td></tr>
<tr class="separator:ga15a737d7e5baf7a08693aed5599f49c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeba0f9aa648285d5e2d56d38d1f77094"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaeba0f9aa648285d5e2d56d38d1f77094">XUARTPS_OPTION_RESET_TMOUT</a>&#160;&#160;&#160;0x0020U</td></tr>
<tr class="memdesc:gaeba0f9aa648285d5e2d56d38d1f77094"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset the receive timeout.  <a href="#gaeba0f9aa648285d5e2d56d38d1f77094">More...</a><br/></td></tr>
<tr class="separator:gaeba0f9aa648285d5e2d56d38d1f77094"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac85b9de79808c7ce7b92a748d7fdb5e2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gac85b9de79808c7ce7b92a748d7fdb5e2">XUARTPS_OPTION_RESET_TX</a>&#160;&#160;&#160;0x0010U</td></tr>
<tr class="memdesc:gac85b9de79808c7ce7b92a748d7fdb5e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset the transmitter.  <a href="#gac85b9de79808c7ce7b92a748d7fdb5e2">More...</a><br/></td></tr>
<tr class="separator:gac85b9de79808c7ce7b92a748d7fdb5e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3e8595042a9f15536cf9ab4d55ea4a94"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga3e8595042a9f15536cf9ab4d55ea4a94">XUARTPS_OPTION_RESET_RX</a>&#160;&#160;&#160;0x0008U</td></tr>
<tr class="memdesc:ga3e8595042a9f15536cf9ab4d55ea4a94"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset the receiver.  <a href="#ga3e8595042a9f15536cf9ab4d55ea4a94">More...</a><br/></td></tr>
<tr class="separator:ga3e8595042a9f15536cf9ab4d55ea4a94"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1f0e4e7525d49994044895137b0d6c25"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga1f0e4e7525d49994044895137b0d6c25">XUARTPS_OPTION_ASSERT_RTS</a>&#160;&#160;&#160;0x0004U</td></tr>
<tr class="memdesc:ga1f0e4e7525d49994044895137b0d6c25"><td class="mdescLeft">&#160;</td><td class="mdescRight">Assert the RTS bit.  <a href="#ga1f0e4e7525d49994044895137b0d6c25">More...</a><br/></td></tr>
<tr class="separator:ga1f0e4e7525d49994044895137b0d6c25"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf4a6f1baf50c915e70d371de1efe6415"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaf4a6f1baf50c915e70d371de1efe6415">XUARTPS_OPTION_ASSERT_DTR</a>&#160;&#160;&#160;0x0002U</td></tr>
<tr class="memdesc:gaf4a6f1baf50c915e70d371de1efe6415"><td class="mdescLeft">&#160;</td><td class="mdescRight">Assert the DTR bit.  <a href="#gaf4a6f1baf50c915e70d371de1efe6415">More...</a><br/></td></tr>
<tr class="separator:gaf4a6f1baf50c915e70d371de1efe6415"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad74cdb596f414bee06ebd9159f496cef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gad74cdb596f414bee06ebd9159f496cef">XUARTPS_OPTION_SET_FCM</a>&#160;&#160;&#160;0x0001U</td></tr>
<tr class="memdesc:gad74cdb596f414bee06ebd9159f496cef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Turn on flow control mode.  <a href="#gad74cdb596f414bee06ebd9159f496cef">More...</a><br/></td></tr>
<tr class="separator:gad74cdb596f414bee06ebd9159f496cef"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Channel Operational Mode</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp830e04a2a4a074eb8f89a3e6410eb97c"></a>The UART can operate in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic echo. </p>
</td></tr>
<tr class="memitem:ga9d916026363230478a8c8729e23f3352"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga9d916026363230478a8c8729e23f3352">XUARTPS_OPER_MODE_NORMAL</a>&#160;&#160;&#160;(u8)0x00U</td></tr>
<tr class="memdesc:ga9d916026363230478a8c8729e23f3352"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal Mode.  <a href="#ga9d916026363230478a8c8729e23f3352">More...</a><br/></td></tr>
<tr class="separator:ga9d916026363230478a8c8729e23f3352"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga59bf55affd72ca3bd5824c921926527b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga59bf55affd72ca3bd5824c921926527b">XUARTPS_OPER_MODE_AUTO_ECHO</a>&#160;&#160;&#160;(u8)0x01U</td></tr>
<tr class="memdesc:ga59bf55affd72ca3bd5824c921926527b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto Echo Mode.  <a href="#ga59bf55affd72ca3bd5824c921926527b">More...</a><br/></td></tr>
<tr class="separator:ga59bf55affd72ca3bd5824c921926527b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3a71908d40b06c097599a5a29d61e800"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga3a71908d40b06c097599a5a29d61e800">XUARTPS_OPER_MODE_LOCAL_LOOP</a>&#160;&#160;&#160;(u8)0x02U</td></tr>
<tr class="memdesc:ga3a71908d40b06c097599a5a29d61e800"><td class="mdescLeft">&#160;</td><td class="mdescRight">Local Loopback Mode.  <a href="#ga3a71908d40b06c097599a5a29d61e800">More...</a><br/></td></tr>
<tr class="separator:ga3a71908d40b06c097599a5a29d61e800"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5e25847001737185c8359cda12524e35"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga5e25847001737185c8359cda12524e35">XUARTPS_OPER_MODE_REMOTE_LOOP</a>&#160;&#160;&#160;(u8)0x03U</td></tr>
<tr class="memdesc:ga5e25847001737185c8359cda12524e35"><td class="mdescLeft">&#160;</td><td class="mdescRight">Remote Loopback Mode.  <a href="#ga5e25847001737185c8359cda12524e35">More...</a><br/></td></tr>
<tr class="separator:ga5e25847001737185c8359cda12524e35"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Data format values</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp561393cbc57b8d06fe9ef22b8e254efb"></a>These constants specify the data format that the driver supports.</p>
<p>The data format includes the number of data bits, the number of stop bits and parity. </p>
</td></tr>
<tr class="memitem:gaa4cfce89f6bb9673aca6917c44f374b1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaa4cfce89f6bb9673aca6917c44f374b1">XUARTPS_FORMAT_8_BITS</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:gaa4cfce89f6bb9673aca6917c44f374b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">8 data bits  <a href="#gaa4cfce89f6bb9673aca6917c44f374b1">More...</a><br/></td></tr>
<tr class="separator:gaa4cfce89f6bb9673aca6917c44f374b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae5c2f638e6460a0be3c85f89309ab7dd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gae5c2f638e6460a0be3c85f89309ab7dd">XUARTPS_FORMAT_7_BITS</a>&#160;&#160;&#160;2U</td></tr>
<tr class="memdesc:gae5c2f638e6460a0be3c85f89309ab7dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">7 data bits  <a href="#gae5c2f638e6460a0be3c85f89309ab7dd">More...</a><br/></td></tr>
<tr class="separator:gae5c2f638e6460a0be3c85f89309ab7dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga18409691f005bcf4524c5d5b4eef8bc9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga18409691f005bcf4524c5d5b4eef8bc9">XUARTPS_FORMAT_6_BITS</a>&#160;&#160;&#160;3U</td></tr>
<tr class="memdesc:ga18409691f005bcf4524c5d5b4eef8bc9"><td class="mdescLeft">&#160;</td><td class="mdescRight">6 data bits  <a href="#ga18409691f005bcf4524c5d5b4eef8bc9">More...</a><br/></td></tr>
<tr class="separator:ga18409691f005bcf4524c5d5b4eef8bc9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadacbaf7f47beeebb7301b6d50b74f6c1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gadacbaf7f47beeebb7301b6d50b74f6c1">XUARTPS_FORMAT_NO_PARITY</a>&#160;&#160;&#160;4U</td></tr>
<tr class="memdesc:gadacbaf7f47beeebb7301b6d50b74f6c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">No parity.  <a href="#gadacbaf7f47beeebb7301b6d50b74f6c1">More...</a><br/></td></tr>
<tr class="separator:gadacbaf7f47beeebb7301b6d50b74f6c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2e8f4dd84f661a7eee839a6b07611b1b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga2e8f4dd84f661a7eee839a6b07611b1b">XUARTPS_FORMAT_MARK_PARITY</a>&#160;&#160;&#160;3U</td></tr>
<tr class="memdesc:ga2e8f4dd84f661a7eee839a6b07611b1b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark parity.  <a href="#ga2e8f4dd84f661a7eee839a6b07611b1b">More...</a><br/></td></tr>
<tr class="separator:ga2e8f4dd84f661a7eee839a6b07611b1b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab23f88cb97896fab3586f9a90145e559"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gab23f88cb97896fab3586f9a90145e559">XUARTPS_FORMAT_SPACE_PARITY</a>&#160;&#160;&#160;2U</td></tr>
<tr class="memdesc:gab23f88cb97896fab3586f9a90145e559"><td class="mdescLeft">&#160;</td><td class="mdescRight">parity  <a href="#gab23f88cb97896fab3586f9a90145e559">More...</a><br/></td></tr>
<tr class="separator:gab23f88cb97896fab3586f9a90145e559"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga86879c57efb1b9351a5ee4f7043054dc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga86879c57efb1b9351a5ee4f7043054dc">XUARTPS_FORMAT_ODD_PARITY</a>&#160;&#160;&#160;1U</td></tr>
<tr class="memdesc:ga86879c57efb1b9351a5ee4f7043054dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Odd parity.  <a href="#ga86879c57efb1b9351a5ee4f7043054dc">More...</a><br/></td></tr>
<tr class="separator:ga86879c57efb1b9351a5ee4f7043054dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga25c1bf78c37b79d68c4094dca8e2aa2c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga25c1bf78c37b79d68c4094dca8e2aa2c">XUARTPS_FORMAT_EVEN_PARITY</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:ga25c1bf78c37b79d68c4094dca8e2aa2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Even parity.  <a href="#ga25c1bf78c37b79d68c4094dca8e2aa2c">More...</a><br/></td></tr>
<tr class="separator:ga25c1bf78c37b79d68c4094dca8e2aa2c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga835065749aec4b9f48a3f2ddbc7e611e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga835065749aec4b9f48a3f2ddbc7e611e">XUARTPS_FORMAT_2_STOP_BIT</a>&#160;&#160;&#160;2U</td></tr>
<tr class="memdesc:ga835065749aec4b9f48a3f2ddbc7e611e"><td class="mdescLeft">&#160;</td><td class="mdescRight">2 stop bits  <a href="#ga835065749aec4b9f48a3f2ddbc7e611e">More...</a><br/></td></tr>
<tr class="separator:ga835065749aec4b9f48a3f2ddbc7e611e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga50680fd4482bdc2b03553ada9af6dbe0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga50680fd4482bdc2b03553ada9af6dbe0">XUARTPS_FORMAT_1_5_STOP_BIT</a>&#160;&#160;&#160;1U</td></tr>
<tr class="memdesc:ga50680fd4482bdc2b03553ada9af6dbe0"><td class="mdescLeft">&#160;</td><td class="mdescRight">1.5 stop bits  <a href="#ga50680fd4482bdc2b03553ada9af6dbe0">More...</a><br/></td></tr>
<tr class="separator:ga50680fd4482bdc2b03553ada9af6dbe0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaacb7c80da54a350343e8deb0d894371"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaaacb7c80da54a350343e8deb0d894371">XUARTPS_FORMAT_1_STOP_BIT</a>&#160;&#160;&#160;0U</td></tr>
<tr class="memdesc:gaaacb7c80da54a350343e8deb0d894371"><td class="mdescLeft">&#160;</td><td class="mdescRight">1 stop bit  <a href="#gaaacb7c80da54a350343e8deb0d894371">More...</a><br/></td></tr>
<tr class="separator:gaaacb7c80da54a350343e8deb0d894371"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Callback events</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpc478b096d0c15f7e00fb1b0587e19c87"></a>These constants specify the handler events that an application can handle using its specific handler function.</p>
<p>Note that these constants are not bit mask, so only one event can be passed to an application at a time. </p>
</td></tr>
<tr class="memitem:ga5df58daf8b254add987548848166a4ea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga5df58daf8b254add987548848166a4ea">XUARTPS_EVENT_RECV_DATA</a>&#160;&#160;&#160;1U</td></tr>
<tr class="memdesc:ga5df58daf8b254add987548848166a4ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data receiving done.  <a href="#ga5df58daf8b254add987548848166a4ea">More...</a><br/></td></tr>
<tr class="separator:ga5df58daf8b254add987548848166a4ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60c5fbf323a23405b48de1eaebb69876"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga60c5fbf323a23405b48de1eaebb69876">XUARTPS_EVENT_RECV_TOUT</a>&#160;&#160;&#160;2U</td></tr>
<tr class="memdesc:ga60c5fbf323a23405b48de1eaebb69876"><td class="mdescLeft">&#160;</td><td class="mdescRight">A receive timeout occurred.  <a href="#ga60c5fbf323a23405b48de1eaebb69876">More...</a><br/></td></tr>
<tr class="separator:ga60c5fbf323a23405b48de1eaebb69876"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga83784b7f23f91b771059aac0125b20a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga83784b7f23f91b771059aac0125b20a6">XUARTPS_EVENT_SENT_DATA</a>&#160;&#160;&#160;3U</td></tr>
<tr class="memdesc:ga83784b7f23f91b771059aac0125b20a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data transmission done.  <a href="#ga83784b7f23f91b771059aac0125b20a6">More...</a><br/></td></tr>
<tr class="separator:ga83784b7f23f91b771059aac0125b20a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4664232aba4f5873439dd72b68cea266"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga4664232aba4f5873439dd72b68cea266">XUARTPS_EVENT_RECV_ERROR</a>&#160;&#160;&#160;4U</td></tr>
<tr class="memdesc:ga4664232aba4f5873439dd72b68cea266"><td class="mdescLeft">&#160;</td><td class="mdescRight">A receive error detected.  <a href="#ga4664232aba4f5873439dd72b68cea266">More...</a><br/></td></tr>
<tr class="separator:ga4664232aba4f5873439dd72b68cea266"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9cd187ec1b79c1ec7daf4c7293d2bdd0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga9cd187ec1b79c1ec7daf4c7293d2bdd0">XUARTPS_EVENT_MODEM</a>&#160;&#160;&#160;5U</td></tr>
<tr class="memdesc:ga9cd187ec1b79c1ec7daf4c7293d2bdd0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Modem status changed.  <a href="#ga9cd187ec1b79c1ec7daf4c7293d2bdd0">More...</a><br/></td></tr>
<tr class="separator:ga9cd187ec1b79c1ec7daf4c7293d2bdd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeb3a7014313858cc5bc8c0e1a779afd4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaeb3a7014313858cc5bc8c0e1a779afd4">XUARTPS_EVENT_PARE_FRAME_BRKE</a>&#160;&#160;&#160;6U</td></tr>
<tr class="memdesc:gaeb3a7014313858cc5bc8c0e1a779afd4"><td class="mdescLeft">&#160;</td><td class="mdescRight">A receive parity, frame, break error detected.  <a href="#gaeb3a7014313858cc5bc8c0e1a779afd4">More...</a><br/></td></tr>
<tr class="separator:gaeb3a7014313858cc5bc8c0e1a779afd4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1371facb57f230f8c3516c95d50db6f0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga1371facb57f230f8c3516c95d50db6f0">XUARTPS_EVENT_RECV_ORERR</a>&#160;&#160;&#160;7U</td></tr>
<tr class="memdesc:ga1371facb57f230f8c3516c95d50db6f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">A receive overrun error detected.  <a href="#ga1371facb57f230f8c3516c95d50db6f0">More...</a><br/></td></tr>
<tr class="separator:ga1371facb57f230f8c3516c95d50db6f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Register Map</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp092729737d14686054aa21531a3582c6"></a>Register offsets for the UART. </p>
</td></tr>
<tr class="memitem:ga90a3cb2c33dba6a5b888f7324d1c5135"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a>&#160;&#160;&#160;0x0000U</td></tr>
<tr class="memdesc:ga90a3cb2c33dba6a5b888f7324d1c5135"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control Register [8:0].  <a href="#ga90a3cb2c33dba6a5b888f7324d1c5135">More...</a><br/></td></tr>
<tr class="separator:ga90a3cb2c33dba6a5b888f7324d1c5135"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad4932468a404b116c0e56b496b906716"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gad4932468a404b116c0e56b496b906716">XUARTPS_MR_OFFSET</a>&#160;&#160;&#160;0x0004U</td></tr>
<tr class="memdesc:gad4932468a404b116c0e56b496b906716"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mode Register [9:0].  <a href="#gad4932468a404b116c0e56b496b906716">More...</a><br/></td></tr>
<tr class="separator:gad4932468a404b116c0e56b496b906716"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga50985f0d8e60110fbbc63b1e100beb68"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga50985f0d8e60110fbbc63b1e100beb68">XUARTPS_IER_OFFSET</a>&#160;&#160;&#160;0x0008U</td></tr>
<tr class="memdesc:ga50985f0d8e60110fbbc63b1e100beb68"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Enable [12:0].  <a href="#ga50985f0d8e60110fbbc63b1e100beb68">More...</a><br/></td></tr>
<tr class="separator:ga50985f0d8e60110fbbc63b1e100beb68"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7e39d2ae49038a4ce4087bbee2bfdab7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga7e39d2ae49038a4ce4087bbee2bfdab7">XUARTPS_IDR_OFFSET</a>&#160;&#160;&#160;0x000CU</td></tr>
<tr class="memdesc:ga7e39d2ae49038a4ce4087bbee2bfdab7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Disable [12:0].  <a href="#ga7e39d2ae49038a4ce4087bbee2bfdab7">More...</a><br/></td></tr>
<tr class="separator:ga7e39d2ae49038a4ce4087bbee2bfdab7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0cfdb73d2795d7cc3b849fe1622fa029"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga0cfdb73d2795d7cc3b849fe1622fa029">XUARTPS_IMR_OFFSET</a>&#160;&#160;&#160;0x0010U</td></tr>
<tr class="memdesc:ga0cfdb73d2795d7cc3b849fe1622fa029"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Mask [12:0].  <a href="#ga0cfdb73d2795d7cc3b849fe1622fa029">More...</a><br/></td></tr>
<tr class="separator:ga0cfdb73d2795d7cc3b849fe1622fa029"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7e96d23606d96a7d9816bc2ff777cbf8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga7e96d23606d96a7d9816bc2ff777cbf8">XUARTPS_ISR_OFFSET</a>&#160;&#160;&#160;0x0014U</td></tr>
<tr class="memdesc:ga7e96d23606d96a7d9816bc2ff777cbf8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Status [12:0].  <a href="#ga7e96d23606d96a7d9816bc2ff777cbf8">More...</a><br/></td></tr>
<tr class="separator:ga7e96d23606d96a7d9816bc2ff777cbf8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga77bb5a0dfa2f1e62cf75c0972e889e92"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga77bb5a0dfa2f1e62cf75c0972e889e92">XUARTPS_BAUDGEN_OFFSET</a>&#160;&#160;&#160;0x0018U</td></tr>
<tr class="memdesc:ga77bb5a0dfa2f1e62cf75c0972e889e92"><td class="mdescLeft">&#160;</td><td class="mdescRight">Baud Rate Generator [15:0].  <a href="#ga77bb5a0dfa2f1e62cf75c0972e889e92">More...</a><br/></td></tr>
<tr class="separator:ga77bb5a0dfa2f1e62cf75c0972e889e92"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3370f0abee2b4247e3c4aecda1fd63e7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga3370f0abee2b4247e3c4aecda1fd63e7">XUARTPS_RXTOUT_OFFSET</a>&#160;&#160;&#160;0x001CU</td></tr>
<tr class="memdesc:ga3370f0abee2b4247e3c4aecda1fd63e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX Timeout [7:0].  <a href="#ga3370f0abee2b4247e3c4aecda1fd63e7">More...</a><br/></td></tr>
<tr class="separator:ga3370f0abee2b4247e3c4aecda1fd63e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabc29194aeedab160158a6d44c647224e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gabc29194aeedab160158a6d44c647224e">XUARTPS_RXWM_OFFSET</a>&#160;&#160;&#160;0x0020U</td></tr>
<tr class="memdesc:gabc29194aeedab160158a6d44c647224e"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX FIFO Trigger Level [5:0].  <a href="#gabc29194aeedab160158a6d44c647224e">More...</a><br/></td></tr>
<tr class="separator:gabc29194aeedab160158a6d44c647224e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2a501f754853b4aa5aaa151a2b8f8bb7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga2a501f754853b4aa5aaa151a2b8f8bb7">XUARTPS_MODEMCR_OFFSET</a>&#160;&#160;&#160;0x0024U</td></tr>
<tr class="memdesc:ga2a501f754853b4aa5aaa151a2b8f8bb7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Modem Control [5:0].  <a href="#ga2a501f754853b4aa5aaa151a2b8f8bb7">More...</a><br/></td></tr>
<tr class="separator:ga2a501f754853b4aa5aaa151a2b8f8bb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga36a307fcdb77eba28c8029f92d4db1b9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga36a307fcdb77eba28c8029f92d4db1b9">XUARTPS_MODEMSR_OFFSET</a>&#160;&#160;&#160;0x0028U</td></tr>
<tr class="memdesc:ga36a307fcdb77eba28c8029f92d4db1b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Modem Status [8:0].  <a href="#ga36a307fcdb77eba28c8029f92d4db1b9">More...</a><br/></td></tr>
<tr class="separator:ga36a307fcdb77eba28c8029f92d4db1b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga342083b04c2f9d589d7dcb1d40b329f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a>&#160;&#160;&#160;0x002CU</td></tr>
<tr class="memdesc:ga342083b04c2f9d589d7dcb1d40b329f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel Status [14:0].  <a href="#ga342083b04c2f9d589d7dcb1d40b329f6">More...</a><br/></td></tr>
<tr class="separator:ga342083b04c2f9d589d7dcb1d40b329f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga12e256a5c0dd76b4c3ce5952382a0400"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga12e256a5c0dd76b4c3ce5952382a0400">XUARTPS_FIFO_OFFSET</a>&#160;&#160;&#160;0x0030U</td></tr>
<tr class="memdesc:ga12e256a5c0dd76b4c3ce5952382a0400"><td class="mdescLeft">&#160;</td><td class="mdescRight">FIFO [7:0].  <a href="#ga12e256a5c0dd76b4c3ce5952382a0400">More...</a><br/></td></tr>
<tr class="separator:ga12e256a5c0dd76b4c3ce5952382a0400"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga18d29d65e26d6c7c192464dbf88aeb55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga18d29d65e26d6c7c192464dbf88aeb55">XUARTPS_BAUDDIV_OFFSET</a>&#160;&#160;&#160;0x0034U</td></tr>
<tr class="memdesc:ga18d29d65e26d6c7c192464dbf88aeb55"><td class="mdescLeft">&#160;</td><td class="mdescRight">Baud Rate Divider [7:0].  <a href="#ga18d29d65e26d6c7c192464dbf88aeb55">More...</a><br/></td></tr>
<tr class="separator:ga18d29d65e26d6c7c192464dbf88aeb55"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7d02d59e19b92baf8fa69dc24833f8a2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga7d02d59e19b92baf8fa69dc24833f8a2">XUARTPS_FLOWDEL_OFFSET</a>&#160;&#160;&#160;0x0038U</td></tr>
<tr class="memdesc:ga7d02d59e19b92baf8fa69dc24833f8a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flow Delay [5:0].  <a href="#ga7d02d59e19b92baf8fa69dc24833f8a2">More...</a><br/></td></tr>
<tr class="separator:ga7d02d59e19b92baf8fa69dc24833f8a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3a498a8321302dae35403f698056058d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga3a498a8321302dae35403f698056058d">XUARTPS_TXWM_OFFSET</a>&#160;&#160;&#160;0x0044U</td></tr>
<tr class="memdesc:ga3a498a8321302dae35403f698056058d"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX FIFO Trigger Level [5:0].  <a href="#ga3a498a8321302dae35403f698056058d">More...</a><br/></td></tr>
<tr class="separator:ga3a498a8321302dae35403f698056058d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad9a37d71fe0f2e6912ad610faae42615"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gad9a37d71fe0f2e6912ad610faae42615">XUARTPS_RXBS_OFFSET</a>&#160;&#160;&#160;0x0048U</td></tr>
<tr class="memdesc:gad9a37d71fe0f2e6912ad610faae42615"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX FIFO Byte Status [11:0].  <a href="#gad9a37d71fe0f2e6912ad610faae42615">More...</a><br/></td></tr>
<tr class="separator:gad9a37d71fe0f2e6912ad610faae42615"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Control Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp51793cbea2ebce2243b8f2115ce2db60"></a>The Control register (CR) controls the major functions of the device.</p>
<p>Control Register Bit Definition </p>
</td></tr>
<tr class="memitem:ga997014ffed40da258769e496544cad9f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga997014ffed40da258769e496544cad9f">XUARTPS_CR_STOPBRK</a>&#160;&#160;&#160;0x00000100U</td></tr>
<tr class="memdesc:ga997014ffed40da258769e496544cad9f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop transmission of break.  <a href="#ga997014ffed40da258769e496544cad9f">More...</a><br/></td></tr>
<tr class="separator:ga997014ffed40da258769e496544cad9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafb47359849b90befe1daa9b8b571cd41"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gafb47359849b90befe1daa9b8b571cd41">XUARTPS_CR_STARTBRK</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memdesc:gafb47359849b90befe1daa9b8b571cd41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set break.  <a href="#gafb47359849b90befe1daa9b8b571cd41">More...</a><br/></td></tr>
<tr class="separator:gafb47359849b90befe1daa9b8b571cd41"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3fbd9a70a2d90299418dd9b5a16b94d9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga3fbd9a70a2d90299418dd9b5a16b94d9">XUARTPS_CR_TORST</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:ga3fbd9a70a2d90299418dd9b5a16b94d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX timeout counter restart.  <a href="#ga3fbd9a70a2d90299418dd9b5a16b94d9">More...</a><br/></td></tr>
<tr class="separator:ga3fbd9a70a2d90299418dd9b5a16b94d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4831dbafe987c3286b022f3ab937bc9a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga4831dbafe987c3286b022f3ab937bc9a">XUARTPS_CR_TX_DIS</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:ga4831dbafe987c3286b022f3ab937bc9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX disabled.  <a href="#ga4831dbafe987c3286b022f3ab937bc9a">More...</a><br/></td></tr>
<tr class="separator:ga4831dbafe987c3286b022f3ab937bc9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf22f08ec08cbe06a53efbd44a43b8096"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaf22f08ec08cbe06a53efbd44a43b8096">XUARTPS_CR_TX_EN</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:gaf22f08ec08cbe06a53efbd44a43b8096"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX enabled.  <a href="#gaf22f08ec08cbe06a53efbd44a43b8096">More...</a><br/></td></tr>
<tr class="separator:gaf22f08ec08cbe06a53efbd44a43b8096"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaffa7bb80501ee66683ce853436190ea9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaffa7bb80501ee66683ce853436190ea9">XUARTPS_CR_RX_DIS</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:gaffa7bb80501ee66683ce853436190ea9"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX disabled.  <a href="#gaffa7bb80501ee66683ce853436190ea9">More...</a><br/></td></tr>
<tr class="separator:gaffa7bb80501ee66683ce853436190ea9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga31a05c9637d59b0631b43758a78d605e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga31a05c9637d59b0631b43758a78d605e">XUARTPS_CR_RX_EN</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:ga31a05c9637d59b0631b43758a78d605e"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX enabled.  <a href="#ga31a05c9637d59b0631b43758a78d605e">More...</a><br/></td></tr>
<tr class="separator:ga31a05c9637d59b0631b43758a78d605e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae297afa5ad30bb459ae92c6289bf24d3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gae297afa5ad30bb459ae92c6289bf24d3">XUARTPS_CR_EN_DIS_MASK</a>&#160;&#160;&#160;0x0000003CU</td></tr>
<tr class="memdesc:gae297afa5ad30bb459ae92c6289bf24d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable/disable Mask.  <a href="#gae297afa5ad30bb459ae92c6289bf24d3">More...</a><br/></td></tr>
<tr class="separator:gae297afa5ad30bb459ae92c6289bf24d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1859f5cbbdbf0a83eff49960ccc342e2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga1859f5cbbdbf0a83eff49960ccc342e2">XUARTPS_CR_TXRST</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga1859f5cbbdbf0a83eff49960ccc342e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX logic reset.  <a href="#ga1859f5cbbdbf0a83eff49960ccc342e2">More...</a><br/></td></tr>
<tr class="separator:ga1859f5cbbdbf0a83eff49960ccc342e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga659be76f18f938134bbe4e8c0e26159b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga659be76f18f938134bbe4e8c0e26159b">XUARTPS_CR_RXRST</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:ga659be76f18f938134bbe4e8c0e26159b"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX logic reset.  <a href="#ga659be76f18f938134bbe4e8c0e26159b">More...</a><br/></td></tr>
<tr class="separator:ga659be76f18f938134bbe4e8c0e26159b"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Mode Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpb0cfdcf9f033fce3ac3cb2dd78fa482c"></a>The mode register (MR) defines the mode of transfer as well as the data format.</p>
<p>If this register is modified during transmission or reception, data validity cannot be guaranteed.</p>
<p>Mode Register Bit Definition </p>
</td></tr>
<tr class="memitem:ga36d6b2e37f0201d8e6ecb20ab4835d83"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga36d6b2e37f0201d8e6ecb20ab4835d83">XUARTPS_MR_CCLK</a>&#160;&#160;&#160;0x00000400U</td></tr>
<tr class="memdesc:ga36d6b2e37f0201d8e6ecb20ab4835d83"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input clock selection.  <a href="#ga36d6b2e37f0201d8e6ecb20ab4835d83">More...</a><br/></td></tr>
<tr class="separator:ga36d6b2e37f0201d8e6ecb20ab4835d83"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadbf78ca00f2906f2b1334c1daa9e8688"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gadbf78ca00f2906f2b1334c1daa9e8688">XUARTPS_MR_CHMODE_R_LOOP</a>&#160;&#160;&#160;0x00000300U</td></tr>
<tr class="memdesc:gadbf78ca00f2906f2b1334c1daa9e8688"><td class="mdescLeft">&#160;</td><td class="mdescRight">Remote loopback mode.  <a href="#gadbf78ca00f2906f2b1334c1daa9e8688">More...</a><br/></td></tr>
<tr class="separator:gadbf78ca00f2906f2b1334c1daa9e8688"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0a3141d2830527a27bf715a0b286936e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga0a3141d2830527a27bf715a0b286936e">XUARTPS_MR_CHMODE_L_LOOP</a>&#160;&#160;&#160;0x00000200U</td></tr>
<tr class="memdesc:ga0a3141d2830527a27bf715a0b286936e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Local loopback mode.  <a href="#ga0a3141d2830527a27bf715a0b286936e">More...</a><br/></td></tr>
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<tr class="memitem:ga23f5cd17565cb514d2cb651a84b0bd71"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga23f5cd17565cb514d2cb651a84b0bd71">XUARTPS_MR_CHMODE_ECHO</a>&#160;&#160;&#160;0x00000100U</td></tr>
<tr class="memdesc:ga23f5cd17565cb514d2cb651a84b0bd71"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto echo mode.  <a href="#ga23f5cd17565cb514d2cb651a84b0bd71">More...</a><br/></td></tr>
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<tr class="memitem:gab9c582f58d3628334fa95502f7532c81"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gab9c582f58d3628334fa95502f7532c81">XUARTPS_MR_CHMODE_NORM</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:gab9c582f58d3628334fa95502f7532c81"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal mode.  <a href="#gab9c582f58d3628334fa95502f7532c81">More...</a><br/></td></tr>
<tr class="separator:gab9c582f58d3628334fa95502f7532c81"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5ed18906d4a19e7f047705902342e758"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga5ed18906d4a19e7f047705902342e758">XUARTPS_MR_CHMODE_SHIFT</a>&#160;&#160;&#160;8U</td></tr>
<tr class="memdesc:ga5ed18906d4a19e7f047705902342e758"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mode shift.  <a href="#ga5ed18906d4a19e7f047705902342e758">More...</a><br/></td></tr>
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<tr class="memitem:ga3097ef040f183de6a8ba8b4cedf64ccf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga3097ef040f183de6a8ba8b4cedf64ccf">XUARTPS_MR_CHMODE_MASK</a>&#160;&#160;&#160;0x00000300U</td></tr>
<tr class="memdesc:ga3097ef040f183de6a8ba8b4cedf64ccf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mode mask.  <a href="#ga3097ef040f183de6a8ba8b4cedf64ccf">More...</a><br/></td></tr>
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<tr class="memitem:gac84dacebc9843a8f520379faa06ba5ac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gac84dacebc9843a8f520379faa06ba5ac">XUARTPS_MR_STOPMODE_2_BIT</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memdesc:gac84dacebc9843a8f520379faa06ba5ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">2 stop bits  <a href="#gac84dacebc9843a8f520379faa06ba5ac">More...</a><br/></td></tr>
<tr class="separator:gac84dacebc9843a8f520379faa06ba5ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1f97e278219f4c7e2dd04f586713539d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga1f97e278219f4c7e2dd04f586713539d">XUARTPS_MR_STOPMODE_1_5_BIT</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:ga1f97e278219f4c7e2dd04f586713539d"><td class="mdescLeft">&#160;</td><td class="mdescRight">1.5 stop bits  <a href="#ga1f97e278219f4c7e2dd04f586713539d">More...</a><br/></td></tr>
<tr class="separator:ga1f97e278219f4c7e2dd04f586713539d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b4e88eab034a961b86ab592369fb766"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga3b4e88eab034a961b86ab592369fb766">XUARTPS_MR_STOPMODE_1_BIT</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:ga3b4e88eab034a961b86ab592369fb766"><td class="mdescLeft">&#160;</td><td class="mdescRight">1 stop bit  <a href="#ga3b4e88eab034a961b86ab592369fb766">More...</a><br/></td></tr>
<tr class="separator:ga3b4e88eab034a961b86ab592369fb766"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga26f962080857bd73db4cd09de29d1140"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga26f962080857bd73db4cd09de29d1140">XUARTPS_MR_STOPMODE_SHIFT</a>&#160;&#160;&#160;6U</td></tr>
<tr class="memdesc:ga26f962080857bd73db4cd09de29d1140"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop bits shift.  <a href="#ga26f962080857bd73db4cd09de29d1140">More...</a><br/></td></tr>
<tr class="separator:ga26f962080857bd73db4cd09de29d1140"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadc83d5b2b747a1d1eac63c5067cf0e88"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gadc83d5b2b747a1d1eac63c5067cf0e88">XUARTPS_MR_STOPMODE_MASK</a>&#160;&#160;&#160;0x000000A0U</td></tr>
<tr class="memdesc:gadc83d5b2b747a1d1eac63c5067cf0e88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop bits mask.  <a href="#gadc83d5b2b747a1d1eac63c5067cf0e88">More...</a><br/></td></tr>
<tr class="separator:gadc83d5b2b747a1d1eac63c5067cf0e88"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga708588a4f5ec6e1b8728268dd0d6ba73"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga708588a4f5ec6e1b8728268dd0d6ba73">XUARTPS_MR_PARITY_NONE</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:ga708588a4f5ec6e1b8728268dd0d6ba73"><td class="mdescLeft">&#160;</td><td class="mdescRight">No parity mode.  <a href="#ga708588a4f5ec6e1b8728268dd0d6ba73">More...</a><br/></td></tr>
<tr class="separator:ga708588a4f5ec6e1b8728268dd0d6ba73"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6485b62e7ab5675f8875b04f934cce5a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga6485b62e7ab5675f8875b04f934cce5a">XUARTPS_MR_PARITY_MARK</a>&#160;&#160;&#160;0x00000018U</td></tr>
<tr class="memdesc:ga6485b62e7ab5675f8875b04f934cce5a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mark parity mode.  <a href="#ga6485b62e7ab5675f8875b04f934cce5a">More...</a><br/></td></tr>
<tr class="separator:ga6485b62e7ab5675f8875b04f934cce5a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga332257f88a1089025cfa6c721b268e53"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga332257f88a1089025cfa6c721b268e53">XUARTPS_MR_PARITY_SPACE</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:ga332257f88a1089025cfa6c721b268e53"><td class="mdescLeft">&#160;</td><td class="mdescRight">Space parity mode.  <a href="#ga332257f88a1089025cfa6c721b268e53">More...</a><br/></td></tr>
<tr class="separator:ga332257f88a1089025cfa6c721b268e53"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad1dbc37545c9dd9b402ebde975ce568f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gad1dbc37545c9dd9b402ebde975ce568f">XUARTPS_MR_PARITY_ODD</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:gad1dbc37545c9dd9b402ebde975ce568f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Odd parity mode.  <a href="#gad1dbc37545c9dd9b402ebde975ce568f">More...</a><br/></td></tr>
<tr class="separator:gad1dbc37545c9dd9b402ebde975ce568f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7321956b668fe79c2d2c399a203b7af3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga7321956b668fe79c2d2c399a203b7af3">XUARTPS_MR_PARITY_EVEN</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:ga7321956b668fe79c2d2c399a203b7af3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Even parity mode.  <a href="#ga7321956b668fe79c2d2c399a203b7af3">More...</a><br/></td></tr>
<tr class="separator:ga7321956b668fe79c2d2c399a203b7af3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga81a8d9730a5ec55902869c011d07433e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga81a8d9730a5ec55902869c011d07433e">XUARTPS_MR_PARITY_SHIFT</a>&#160;&#160;&#160;3U</td></tr>
<tr class="memdesc:ga81a8d9730a5ec55902869c011d07433e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Parity setting shift.  <a href="#ga81a8d9730a5ec55902869c011d07433e">More...</a><br/></td></tr>
<tr class="separator:ga81a8d9730a5ec55902869c011d07433e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga062f61f5b1d33404b4328d15a4010f5c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga062f61f5b1d33404b4328d15a4010f5c">XUARTPS_MR_PARITY_MASK</a>&#160;&#160;&#160;0x00000038U</td></tr>
<tr class="memdesc:ga062f61f5b1d33404b4328d15a4010f5c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Parity mask.  <a href="#ga062f61f5b1d33404b4328d15a4010f5c">More...</a><br/></td></tr>
<tr class="separator:ga062f61f5b1d33404b4328d15a4010f5c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga168dc3bf9cf1fe0d46a1bef522621d90"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga168dc3bf9cf1fe0d46a1bef522621d90">XUARTPS_MR_CHARLEN_6_BIT</a>&#160;&#160;&#160;0x00000006U</td></tr>
<tr class="memdesc:ga168dc3bf9cf1fe0d46a1bef522621d90"><td class="mdescLeft">&#160;</td><td class="mdescRight">6 bits data  <a href="#ga168dc3bf9cf1fe0d46a1bef522621d90">More...</a><br/></td></tr>
<tr class="separator:ga168dc3bf9cf1fe0d46a1bef522621d90"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5a506892b297daffb60aafead45870f5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga5a506892b297daffb60aafead45870f5">XUARTPS_MR_CHARLEN_7_BIT</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:ga5a506892b297daffb60aafead45870f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">7 bits data  <a href="#ga5a506892b297daffb60aafead45870f5">More...</a><br/></td></tr>
<tr class="separator:ga5a506892b297daffb60aafead45870f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga038e90de6132f4e00b64b0f34ff0dfa7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga038e90de6132f4e00b64b0f34ff0dfa7">XUARTPS_MR_CHARLEN_8_BIT</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:ga038e90de6132f4e00b64b0f34ff0dfa7"><td class="mdescLeft">&#160;</td><td class="mdescRight">8 bits data  <a href="#ga038e90de6132f4e00b64b0f34ff0dfa7">More...</a><br/></td></tr>
<tr class="separator:ga038e90de6132f4e00b64b0f34ff0dfa7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga486e6d26bf3570c2f14cdbae2c246648"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga486e6d26bf3570c2f14cdbae2c246648">XUARTPS_MR_CHARLEN_SHIFT</a>&#160;&#160;&#160;1U</td></tr>
<tr class="memdesc:ga486e6d26bf3570c2f14cdbae2c246648"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Length shift.  <a href="#ga486e6d26bf3570c2f14cdbae2c246648">More...</a><br/></td></tr>
<tr class="separator:ga486e6d26bf3570c2f14cdbae2c246648"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae973a7d15eb3f582200a39f3a0444a66"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gae973a7d15eb3f582200a39f3a0444a66">XUARTPS_MR_CHARLEN_MASK</a>&#160;&#160;&#160;0x00000006U</td></tr>
<tr class="memdesc:gae973a7d15eb3f582200a39f3a0444a66"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data length mask.  <a href="#gae973a7d15eb3f582200a39f3a0444a66">More...</a><br/></td></tr>
<tr class="separator:gae973a7d15eb3f582200a39f3a0444a66"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac383c8056146a93a6113ce9a05501ffd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gac383c8056146a93a6113ce9a05501ffd">XUARTPS_MR_CLKSEL</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:gac383c8056146a93a6113ce9a05501ffd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input clock selection.  <a href="#gac383c8056146a93a6113ce9a05501ffd">More...</a><br/></td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Interrupt Registers</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpb7f2dfe000192c9354c2f2cd581ede41"></a>Interrupt control logic uses the interrupt enable register (IER) and the interrupt disable register (IDR) to set the value of the bits in the interrupt mask register (IMR).</p>
<p>The IMR determines whether to pass an interrupt to the interrupt status register (ISR). Writing a 1 to IER Enbables an interrupt, writing a 1 to IDR disables an interrupt. IMR and ISR are read only, and IER and IDR are write only. Reading either IER or IDR returns 0x00.</p>
<p>All four registers have the same bit definitions. </p>
</td></tr>
<tr class="memitem:gab5df3d1fd00008bd7cc177abd02f07e5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gab5df3d1fd00008bd7cc177abd02f07e5">XUARTPS_IXR_RBRK</a>&#160;&#160;&#160;0x00002000U</td></tr>
<tr class="memdesc:gab5df3d1fd00008bd7cc177abd02f07e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rx FIFO break detect interrupt.  <a href="#gab5df3d1fd00008bd7cc177abd02f07e5">More...</a><br/></td></tr>
<tr class="separator:gab5df3d1fd00008bd7cc177abd02f07e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gace9c111cfb0362f6bb74d5893d3eccaf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gace9c111cfb0362f6bb74d5893d3eccaf">XUARTPS_IXR_TOVR</a>&#160;&#160;&#160;0x00001000U</td></tr>
<tr class="memdesc:gace9c111cfb0362f6bb74d5893d3eccaf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tx FIFO Overflow interrupt.  <a href="#gace9c111cfb0362f6bb74d5893d3eccaf">More...</a><br/></td></tr>
<tr class="separator:gace9c111cfb0362f6bb74d5893d3eccaf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaffe1c724e8882759a6c4fdba948d6a2d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaffe1c724e8882759a6c4fdba948d6a2d">XUARTPS_IXR_TNFUL</a>&#160;&#160;&#160;0x00000800U</td></tr>
<tr class="memdesc:gaffe1c724e8882759a6c4fdba948d6a2d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tx FIFO Nearly Full interrupt.  <a href="#gaffe1c724e8882759a6c4fdba948d6a2d">More...</a><br/></td></tr>
<tr class="separator:gaffe1c724e8882759a6c4fdba948d6a2d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0432c93dc768cb173d84cc67dd6bbedc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga0432c93dc768cb173d84cc67dd6bbedc">XUARTPS_IXR_TTRIG</a>&#160;&#160;&#160;0x00000400U</td></tr>
<tr class="memdesc:ga0432c93dc768cb173d84cc67dd6bbedc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tx Trig interrupt.  <a href="#ga0432c93dc768cb173d84cc67dd6bbedc">More...</a><br/></td></tr>
<tr class="separator:ga0432c93dc768cb173d84cc67dd6bbedc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadf1dabb7547f5b16748e8c6307cfc7a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gadf1dabb7547f5b16748e8c6307cfc7a1">XUARTPS_IXR_DMS</a>&#160;&#160;&#160;0x00000200U</td></tr>
<tr class="memdesc:gadf1dabb7547f5b16748e8c6307cfc7a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Modem status change interrupt.  <a href="#gadf1dabb7547f5b16748e8c6307cfc7a1">More...</a><br/></td></tr>
<tr class="separator:gadf1dabb7547f5b16748e8c6307cfc7a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7194f5e99a1a98178f6bf1462791aaac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga7194f5e99a1a98178f6bf1462791aaac">XUARTPS_IXR_TOUT</a>&#160;&#160;&#160;0x00000100U</td></tr>
<tr class="memdesc:ga7194f5e99a1a98178f6bf1462791aaac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timeout error interrupt.  <a href="#ga7194f5e99a1a98178f6bf1462791aaac">More...</a><br/></td></tr>
<tr class="separator:ga7194f5e99a1a98178f6bf1462791aaac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2a11620ed0dd465adf0de24f6d7ad418"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga2a11620ed0dd465adf0de24f6d7ad418">XUARTPS_IXR_PARITY</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memdesc:ga2a11620ed0dd465adf0de24f6d7ad418"><td class="mdescLeft">&#160;</td><td class="mdescRight">Parity error interrupt.  <a href="#ga2a11620ed0dd465adf0de24f6d7ad418">More...</a><br/></td></tr>
<tr class="separator:ga2a11620ed0dd465adf0de24f6d7ad418"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa6048212fde48f7188efd90c83c4822d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaa6048212fde48f7188efd90c83c4822d">XUARTPS_IXR_FRAMING</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:gaa6048212fde48f7188efd90c83c4822d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Framing error interrupt.  <a href="#gaa6048212fde48f7188efd90c83c4822d">More...</a><br/></td></tr>
<tr class="separator:gaa6048212fde48f7188efd90c83c4822d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd4a37077bddeeefcc39d58b4f08fb23"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gafd4a37077bddeeefcc39d58b4f08fb23">XUARTPS_IXR_OVER</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:gafd4a37077bddeeefcc39d58b4f08fb23"><td class="mdescLeft">&#160;</td><td class="mdescRight">Overrun error interrupt.  <a href="#gafd4a37077bddeeefcc39d58b4f08fb23">More...</a><br/></td></tr>
<tr class="separator:gafd4a37077bddeeefcc39d58b4f08fb23"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9abc091be0a0e2cc18bbc540db6e513b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga9abc091be0a0e2cc18bbc540db6e513b">XUARTPS_IXR_TXFULL</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:ga9abc091be0a0e2cc18bbc540db6e513b"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX FIFO full interrupt.  <a href="#ga9abc091be0a0e2cc18bbc540db6e513b">More...</a><br/></td></tr>
<tr class="separator:ga9abc091be0a0e2cc18bbc540db6e513b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9a4207349f3980046ba4ea9e4379007a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga9a4207349f3980046ba4ea9e4379007a">XUARTPS_IXR_TXEMPTY</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:ga9a4207349f3980046ba4ea9e4379007a"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX FIFO empty interrupt.  <a href="#ga9a4207349f3980046ba4ea9e4379007a">More...</a><br/></td></tr>
<tr class="separator:ga9a4207349f3980046ba4ea9e4379007a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae374cc3c085d3cac795d95b657b03d5e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gae374cc3c085d3cac795d95b657b03d5e">XUARTPS_IXR_RXFULL</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:gae374cc3c085d3cac795d95b657b03d5e"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX FIFO full interrupt.  <a href="#gae374cc3c085d3cac795d95b657b03d5e">More...</a><br/></td></tr>
<tr class="separator:gae374cc3c085d3cac795d95b657b03d5e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga541b132695e333571fd8c6b2eeaa23bd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga541b132695e333571fd8c6b2eeaa23bd">XUARTPS_IXR_RXEMPTY</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga541b132695e333571fd8c6b2eeaa23bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX FIFO empty interrupt.  <a href="#ga541b132695e333571fd8c6b2eeaa23bd">More...</a><br/></td></tr>
<tr class="separator:ga541b132695e333571fd8c6b2eeaa23bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaad5de1c646049d7ced8841e316a34892"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaad5de1c646049d7ced8841e316a34892">XUARTPS_IXR_RXOVR</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:gaad5de1c646049d7ced8841e316a34892"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX FIFO trigger interrupt.  <a href="#gaad5de1c646049d7ced8841e316a34892">More...</a><br/></td></tr>
<tr class="separator:gaad5de1c646049d7ced8841e316a34892"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga73b78b2490f8a0aa402867987c765df0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga73b78b2490f8a0aa402867987c765df0">XUARTPS_IXR_MASK</a>&#160;&#160;&#160;0x00003FFFU</td></tr>
<tr class="memdesc:ga73b78b2490f8a0aa402867987c765df0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Valid bit mask.  <a href="#ga73b78b2490f8a0aa402867987c765df0">More...</a><br/></td></tr>
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Baud Rate Generator Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpcc47ee1e8ef02853ba8af385eb2c12c9"></a>The baud rate generator control register (BRGR) is a 16 bit register that controls the receiver bit sample clock and baud rate.</p>
<p>Valid values are 1 - 65535.</p>
<p>Bit Sample Rate = CCLK / BRGR, where the CCLK is selected by the MR_CCLK bit in the MR register. </p>
</td></tr>
<tr class="memitem:ga19279c6968bf5936d9af320ff2c3c404"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga19279c6968bf5936d9af320ff2c3c404">XUARTPS_BAUDGEN_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:ga19279c6968bf5936d9af320ff2c3c404"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable clock.  <a href="#ga19279c6968bf5936d9af320ff2c3c404">More...</a><br/></td></tr>
<tr class="separator:ga19279c6968bf5936d9af320ff2c3c404"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3140f225a4fafc91ca8f5cdafb35d84a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga3140f225a4fafc91ca8f5cdafb35d84a">XUARTPS_BAUDGEN_MASK</a>&#160;&#160;&#160;0x0000FFFFU</td></tr>
<tr class="memdesc:ga3140f225a4fafc91ca8f5cdafb35d84a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Valid bits mask.  <a href="#ga3140f225a4fafc91ca8f5cdafb35d84a">More...</a><br/></td></tr>
<tr class="separator:ga3140f225a4fafc91ca8f5cdafb35d84a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0df74dbc1f99f853eac534c58465c67c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga0df74dbc1f99f853eac534c58465c67c">XUARTPS_BAUDGEN_RESET_VAL</a>&#160;&#160;&#160;0x0000028BU</td></tr>
<tr class="memdesc:ga0df74dbc1f99f853eac534c58465c67c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset value.  <a href="#ga0df74dbc1f99f853eac534c58465c67c">More...</a><br/></td></tr>
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Baud Divisor Rate register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpbbcf95817a17816189f8fd4d1b341f7c"></a>The baud rate divider register (BDIV) controls how much the bit sample rate is divided by.</p>
<p>It sets the baud rate. Valid values are 0x04 to 0xFF. Writing a value less than 4 will be ignored.</p>
<p>Baud rate = CCLK / ((BAUDDIV + 1) x BRGR), where the CCLK is selected by the MR_CCLK bit in the MR register. </p>
</td></tr>
<tr class="memitem:ga0994c9a85c14e41d593f7ced18d73325"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga0994c9a85c14e41d593f7ced18d73325">XUARTPS_BAUDDIV_MASK</a>&#160;&#160;&#160;0x000000FFU</td></tr>
<tr class="memdesc:ga0994c9a85c14e41d593f7ced18d73325"><td class="mdescLeft">&#160;</td><td class="mdescRight">8 bit baud divider mask  <a href="#ga0994c9a85c14e41d593f7ced18d73325">More...</a><br/></td></tr>
<tr class="separator:ga0994c9a85c14e41d593f7ced18d73325"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaae81b813494b51dffc97f265ccc8bc1b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaae81b813494b51dffc97f265ccc8bc1b">XUARTPS_BAUDDIV_RESET_VAL</a>&#160;&#160;&#160;0x0000000FU</td></tr>
<tr class="memdesc:gaae81b813494b51dffc97f265ccc8bc1b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset value.  <a href="#gaae81b813494b51dffc97f265ccc8bc1b">More...</a><br/></td></tr>
<tr class="separator:gaae81b813494b51dffc97f265ccc8bc1b"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Receiver Timeout Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp16c459a763e79af8765d11904500ea61"></a>Use the receiver timeout register (RTR) to detect an idle condition on the receiver data line. </p>
</td></tr>
<tr class="memitem:ga9940f0728fcd584c7805eed12531539e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga9940f0728fcd584c7805eed12531539e">XUARTPS_RXTOUT_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:ga9940f0728fcd584c7805eed12531539e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable time out.  <a href="#ga9940f0728fcd584c7805eed12531539e">More...</a><br/></td></tr>
<tr class="separator:ga9940f0728fcd584c7805eed12531539e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga391ed6bbae78f486a638f48f539f7755"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga391ed6bbae78f486a638f48f539f7755">XUARTPS_RXTOUT_MASK</a>&#160;&#160;&#160;0x000000FFU</td></tr>
<tr class="memdesc:ga391ed6bbae78f486a638f48f539f7755"><td class="mdescLeft">&#160;</td><td class="mdescRight">Valid bits mask.  <a href="#ga391ed6bbae78f486a638f48f539f7755">More...</a><br/></td></tr>
<tr class="separator:ga391ed6bbae78f486a638f48f539f7755"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Receiver FIFO Trigger Level Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp5ce35e3b6e6b0693f1502919bfb101d1"></a>Use the Receiver FIFO Trigger Level Register (RTRIG) to set the value at which the RX FIFO triggers an interrupt event. </p>
</td></tr>
<tr class="memitem:ga31cf74ecfe8e69ba47c040de1a756417"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga31cf74ecfe8e69ba47c040de1a756417">XUARTPS_RXWM_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memdesc:ga31cf74ecfe8e69ba47c040de1a756417"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable RX trigger interrupt.  <a href="#ga31cf74ecfe8e69ba47c040de1a756417">More...</a><br/></td></tr>
<tr class="separator:ga31cf74ecfe8e69ba47c040de1a756417"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0b1b76b99179a02db9e22d6c290765fd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga0b1b76b99179a02db9e22d6c290765fd">XUARTPS_RXWM_MASK</a>&#160;&#160;&#160;0x0000003FU</td></tr>
<tr class="memdesc:ga0b1b76b99179a02db9e22d6c290765fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Valid bits mask.  <a href="#ga0b1b76b99179a02db9e22d6c290765fd">More...</a><br/></td></tr>
<tr class="separator:ga0b1b76b99179a02db9e22d6c290765fd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf1d0d57b5ac837fc55dd128383dcafa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gabf1d0d57b5ac837fc55dd128383dcafa">XUARTPS_RXWM_RESET_VAL</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:gabf1d0d57b5ac837fc55dd128383dcafa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset value.  <a href="#gabf1d0d57b5ac837fc55dd128383dcafa">More...</a><br/></td></tr>
<tr class="separator:gabf1d0d57b5ac837fc55dd128383dcafa"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Transmit FIFO Trigger Level Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp7416de9b2f8d7791c616154303e4210a"></a>Use the Transmit FIFO Trigger Level Register (TTRIG) to set the value at which the TX FIFO triggers an interrupt event. </p>
</td></tr>
<tr class="memitem:ga349330dc3cda8326ec19ca411eb08545"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga349330dc3cda8326ec19ca411eb08545">XUARTPS_TXWM_MASK</a>&#160;&#160;&#160;0x0000003FU</td></tr>
<tr class="memdesc:ga349330dc3cda8326ec19ca411eb08545"><td class="mdescLeft">&#160;</td><td class="mdescRight">Valid bits mask.  <a href="#ga349330dc3cda8326ec19ca411eb08545">More...</a><br/></td></tr>
<tr class="separator:ga349330dc3cda8326ec19ca411eb08545"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacd020d8ceafb59c1deffa8ad5b2f859e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gacd020d8ceafb59c1deffa8ad5b2f859e">XUARTPS_TXWM_RESET_VAL</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:gacd020d8ceafb59c1deffa8ad5b2f859e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset value.  <a href="#gacd020d8ceafb59c1deffa8ad5b2f859e">More...</a><br/></td></tr>
<tr class="separator:gacd020d8ceafb59c1deffa8ad5b2f859e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Modem Control Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp2796b67f3c24ee786ea09162dd7b98e6"></a>This register (MODEMCR) controls the interface with the modem or data set, or a peripheral device emulating a modem. </p>
</td></tr>
<tr class="memitem:ga664e6b91e03cbb02d76d61b830606746"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga664e6b91e03cbb02d76d61b830606746">XUARTPS_MODEMCR_FCM</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:ga664e6b91e03cbb02d76d61b830606746"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flow control mode.  <a href="#ga664e6b91e03cbb02d76d61b830606746">More...</a><br/></td></tr>
<tr class="separator:ga664e6b91e03cbb02d76d61b830606746"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae46d78a9b6d4f781341d046bc8647fb1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gae46d78a9b6d4f781341d046bc8647fb1">XUARTPS_MODEMCR_RTS</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:gae46d78a9b6d4f781341d046bc8647fb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Request to send.  <a href="#gae46d78a9b6d4f781341d046bc8647fb1">More...</a><br/></td></tr>
<tr class="separator:gae46d78a9b6d4f781341d046bc8647fb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae32a046cc6b0c46a603b8c30a48312ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gae32a046cc6b0c46a603b8c30a48312ad">XUARTPS_MODEMCR_DTR</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:gae32a046cc6b0c46a603b8c30a48312ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data terminal ready.  <a href="#gae32a046cc6b0c46a603b8c30a48312ad">More...</a><br/></td></tr>
<tr class="separator:gae32a046cc6b0c46a603b8c30a48312ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Modem Status Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp52ea33da2d280dcd840916142c49455d"></a>This register (MODEMSR) indicates the current state of the control lines from a modem, or another peripheral device, to the CPU.</p>
<p>In addition, four bits of the modem status register provide change information. These bits are set to a logic 1 whenever a control input from the modem changes state.</p>
<p>Note: Whenever the DCTS, DDSR, TERI, or DDCD bit is set to logic 1, a modem status interrupt is generated and this is reflected in the modem status register. </p>
</td></tr>
<tr class="memitem:ga463d850e21bba14919f9b50dcd20e2a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga463d850e21bba14919f9b50dcd20e2a6">XUARTPS_MODEMSR_FCMS</a>&#160;&#160;&#160;0x00000100U</td></tr>
<tr class="memdesc:ga463d850e21bba14919f9b50dcd20e2a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flow control mode (FCMS)  <a href="#ga463d850e21bba14919f9b50dcd20e2a6">More...</a><br/></td></tr>
<tr class="separator:ga463d850e21bba14919f9b50dcd20e2a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga95f1f46aa5d8066f272566450016c048"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga95f1f46aa5d8066f272566450016c048">XUARTPS_MODEMSR_DCD</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memdesc:ga95f1f46aa5d8066f272566450016c048"><td class="mdescLeft">&#160;</td><td class="mdescRight">Complement of DCD input.  <a href="#ga95f1f46aa5d8066f272566450016c048">More...</a><br/></td></tr>
<tr class="separator:ga95f1f46aa5d8066f272566450016c048"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga98d227162a5e307a8e0f1df5c3055e68"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga98d227162a5e307a8e0f1df5c3055e68">XUARTPS_MODEMSR_RI</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:ga98d227162a5e307a8e0f1df5c3055e68"><td class="mdescLeft">&#160;</td><td class="mdescRight">Complement of RI input.  <a href="#ga98d227162a5e307a8e0f1df5c3055e68">More...</a><br/></td></tr>
<tr class="separator:ga98d227162a5e307a8e0f1df5c3055e68"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga628d3070bb4cbbef3614c0dee9cb52f4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga628d3070bb4cbbef3614c0dee9cb52f4">XUARTPS_MODEMSR_DSR</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:ga628d3070bb4cbbef3614c0dee9cb52f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Complement of DSR input.  <a href="#ga628d3070bb4cbbef3614c0dee9cb52f4">More...</a><br/></td></tr>
<tr class="separator:ga628d3070bb4cbbef3614c0dee9cb52f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga89fcadc66f14e3e74211f140205acbfa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga89fcadc66f14e3e74211f140205acbfa">XUARTPS_MODEMSR_CTS</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:ga89fcadc66f14e3e74211f140205acbfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Complement of CTS input.  <a href="#ga89fcadc66f14e3e74211f140205acbfa">More...</a><br/></td></tr>
<tr class="separator:ga89fcadc66f14e3e74211f140205acbfa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d0628da915d6e0ec3d9c3aa0f99a6e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga9d0628da915d6e0ec3d9c3aa0f99a6e8">XUARTPS_MODEMSR_DDCD</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:ga9d0628da915d6e0ec3d9c3aa0f99a6e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Delta DCD indicator.  <a href="#ga9d0628da915d6e0ec3d9c3aa0f99a6e8">More...</a><br/></td></tr>
<tr class="separator:ga9d0628da915d6e0ec3d9c3aa0f99a6e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga436c976255badb632aca558faac74a5c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga436c976255badb632aca558faac74a5c">XUARTPS_MODEMSR_TERI</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:ga436c976255badb632aca558faac74a5c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Trailing Edge Ring Indicator.  <a href="#ga436c976255badb632aca558faac74a5c">More...</a><br/></td></tr>
<tr class="separator:ga436c976255badb632aca558faac74a5c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga045cf2ea99ad7e3761cdd44ba234ce07"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga045cf2ea99ad7e3761cdd44ba234ce07">XUARTPS_MODEMSR_DDSR</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga045cf2ea99ad7e3761cdd44ba234ce07"><td class="mdescLeft">&#160;</td><td class="mdescRight">Change of DSR.  <a href="#ga045cf2ea99ad7e3761cdd44ba234ce07">More...</a><br/></td></tr>
<tr class="separator:ga045cf2ea99ad7e3761cdd44ba234ce07"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabefff2fb8865b052a2452c8dfa29beec"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gabefff2fb8865b052a2452c8dfa29beec">XUARTPS_MODEMSR_DCTS</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:gabefff2fb8865b052a2452c8dfa29beec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Change of CTS.  <a href="#gabefff2fb8865b052a2452c8dfa29beec">More...</a><br/></td></tr>
<tr class="separator:gabefff2fb8865b052a2452c8dfa29beec"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Channel Status Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp115c1711a08638bdf99d26f19a84d671"></a>The channel status register (CSR) is provided to enable the control logic to monitor the status of bits in the channel interrupt status register, even if these are masked out by the interrupt mask register. </p>
</td></tr>
<tr class="memitem:gad4c950d463146caef09d4ef0dd168fc1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gad4c950d463146caef09d4ef0dd168fc1">XUARTPS_SR_TNFUL</a>&#160;&#160;&#160;0x00004000U</td></tr>
<tr class="memdesc:gad4c950d463146caef09d4ef0dd168fc1"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX FIFO Nearly Full Status.  <a href="#gad4c950d463146caef09d4ef0dd168fc1">More...</a><br/></td></tr>
<tr class="separator:gad4c950d463146caef09d4ef0dd168fc1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga111b277a26cb61628b2b5a1395e6e5de"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga111b277a26cb61628b2b5a1395e6e5de">XUARTPS_SR_TTRIG</a>&#160;&#160;&#160;0x00002000U</td></tr>
<tr class="memdesc:ga111b277a26cb61628b2b5a1395e6e5de"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX FIFO Trigger Status.  <a href="#ga111b277a26cb61628b2b5a1395e6e5de">More...</a><br/></td></tr>
<tr class="separator:ga111b277a26cb61628b2b5a1395e6e5de"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac592e66801976640af2e3e08b7259d08"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gac592e66801976640af2e3e08b7259d08">XUARTPS_SR_FLOWDEL</a>&#160;&#160;&#160;0x00001000U</td></tr>
<tr class="memdesc:gac592e66801976640af2e3e08b7259d08"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX FIFO fill over flow delay.  <a href="#gac592e66801976640af2e3e08b7259d08">More...</a><br/></td></tr>
<tr class="separator:gac592e66801976640af2e3e08b7259d08"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5032d2efd70379e4c525816c0f75c724"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga5032d2efd70379e4c525816c0f75c724">XUARTPS_SR_TACTIVE</a>&#160;&#160;&#160;0x00000800U</td></tr>
<tr class="memdesc:ga5032d2efd70379e4c525816c0f75c724"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX active.  <a href="#ga5032d2efd70379e4c525816c0f75c724">More...</a><br/></td></tr>
<tr class="separator:ga5032d2efd70379e4c525816c0f75c724"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga85bccd08f2770a3f7795db3bfa5dac13"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga85bccd08f2770a3f7795db3bfa5dac13">XUARTPS_SR_RACTIVE</a>&#160;&#160;&#160;0x00000400U</td></tr>
<tr class="memdesc:ga85bccd08f2770a3f7795db3bfa5dac13"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX active.  <a href="#ga85bccd08f2770a3f7795db3bfa5dac13">More...</a><br/></td></tr>
<tr class="separator:ga85bccd08f2770a3f7795db3bfa5dac13"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1fe57953aa624e5c7a1c8e20799dc012"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga1fe57953aa624e5c7a1c8e20799dc012">XUARTPS_SR_TXFULL</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:ga1fe57953aa624e5c7a1c8e20799dc012"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX FIFO full.  <a href="#ga1fe57953aa624e5c7a1c8e20799dc012">More...</a><br/></td></tr>
<tr class="separator:ga1fe57953aa624e5c7a1c8e20799dc012"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4eb9c1b9ceaf7aecb36d43c983edbe95"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga4eb9c1b9ceaf7aecb36d43c983edbe95">XUARTPS_SR_TXEMPTY</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:ga4eb9c1b9ceaf7aecb36d43c983edbe95"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX FIFO empty.  <a href="#ga4eb9c1b9ceaf7aecb36d43c983edbe95">More...</a><br/></td></tr>
<tr class="separator:ga4eb9c1b9ceaf7aecb36d43c983edbe95"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1871fba85971f549aff226215f9936a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga1871fba85971f549aff226215f9936a5">XUARTPS_SR_RXFULL</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:ga1871fba85971f549aff226215f9936a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX FIFO full.  <a href="#ga1871fba85971f549aff226215f9936a5">More...</a><br/></td></tr>
<tr class="separator:ga1871fba85971f549aff226215f9936a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad604ae6739b459eb76fd3515d3d4f249"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gad604ae6739b459eb76fd3515d3d4f249">XUARTPS_SR_RXEMPTY</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:gad604ae6739b459eb76fd3515d3d4f249"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX FIFO empty.  <a href="#gad604ae6739b459eb76fd3515d3d4f249">More...</a><br/></td></tr>
<tr class="separator:gad604ae6739b459eb76fd3515d3d4f249"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga954d4d3a50798651fff9701809b20130"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga954d4d3a50798651fff9701809b20130">XUARTPS_SR_RXOVR</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:ga954d4d3a50798651fff9701809b20130"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX FIFO fill over trigger.  <a href="#ga954d4d3a50798651fff9701809b20130">More...</a><br/></td></tr>
<tr class="separator:ga954d4d3a50798651fff9701809b20130"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Flow Delay Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp0e7c6822e790681d528d1f92e684efb8"></a>Operation of the flow delay register (FLOWDEL) is very similar to the receive FIFO trigger register.</p>
<p>An internal trigger signal activates when the FIFO is filled to the level set by this register. This trigger will not cause an interrupt, although it can be read through the channel status register. In hardware flow control mode, RTS is deactivated when the trigger becomes active. RTS only resets when the FIFO level is four less than the level of the flow delay trigger and the flow delay trigger is not activated. A value less than 4 disables the flow delay. </p>
</td></tr>
<tr class="memitem:ga6b7df91642929dda91d4098ed126134c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga6b7df91642929dda91d4098ed126134c">XUARTPS_FLOWDEL_MASK</a>&#160;&#160;&#160;<a class="el" href="group__uartps.html#ga0b1b76b99179a02db9e22d6c290765fd">XUARTPS_RXWM_MASK</a></td></tr>
<tr class="memdesc:ga6b7df91642929dda91d4098ed126134c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Valid bit mask.  <a href="#ga6b7df91642929dda91d4098ed126134c">More...</a><br/></td></tr>
<tr class="separator:ga6b7df91642929dda91d4098ed126134c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Receiver FIFO Byte Status Register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpa9904ea7875ad1b6c2850987f8110b57"></a>The Receiver FIFO Status register is used to have a continuous monitoring of the raw unmasked byte status information.</p>
<p>The register contains frame, parity and break status information for the top four bytes in the RX FIFO.</p>
<p>Receiver FIFO Byte Status Register Bit Definition </p>
</td></tr>
<tr class="memitem:gaf5abd2b8dd323af05918280deb04058e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaf5abd2b8dd323af05918280deb04058e">XUARTPS_RXBS_BYTE3_BRKE</a>&#160;&#160;&#160;0x00000800U</td></tr>
<tr class="memdesc:gaf5abd2b8dd323af05918280deb04058e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte3 Break Error.  <a href="#gaf5abd2b8dd323af05918280deb04058e">More...</a><br/></td></tr>
<tr class="separator:gaf5abd2b8dd323af05918280deb04058e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac72a6c9ccc3df79e17a97a65eaf18d75"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gac72a6c9ccc3df79e17a97a65eaf18d75">XUARTPS_RXBS_BYTE3_FRME</a>&#160;&#160;&#160;0x00000400U</td></tr>
<tr class="memdesc:gac72a6c9ccc3df79e17a97a65eaf18d75"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte3 Frame Error.  <a href="#gac72a6c9ccc3df79e17a97a65eaf18d75">More...</a><br/></td></tr>
<tr class="separator:gac72a6c9ccc3df79e17a97a65eaf18d75"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac5a6ee8b0a568aa4add2089b7d762438"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gac5a6ee8b0a568aa4add2089b7d762438">XUARTPS_RXBS_BYTE3_PARE</a>&#160;&#160;&#160;0x00000200U</td></tr>
<tr class="memdesc:gac5a6ee8b0a568aa4add2089b7d762438"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte3 Parity Error.  <a href="#gac5a6ee8b0a568aa4add2089b7d762438">More...</a><br/></td></tr>
<tr class="separator:gac5a6ee8b0a568aa4add2089b7d762438"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad84d5ed923253797a6afa6c64b4a3dd0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gad84d5ed923253797a6afa6c64b4a3dd0">XUARTPS_RXBS_BYTE2_BRKE</a>&#160;&#160;&#160;0x00000100U</td></tr>
<tr class="memdesc:gad84d5ed923253797a6afa6c64b4a3dd0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte2 Break Error.  <a href="#gad84d5ed923253797a6afa6c64b4a3dd0">More...</a><br/></td></tr>
<tr class="separator:gad84d5ed923253797a6afa6c64b4a3dd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae0c10001ad4dd9794de2de3387dd2c99"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gae0c10001ad4dd9794de2de3387dd2c99">XUARTPS_RXBS_BYTE2_FRME</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memdesc:gae0c10001ad4dd9794de2de3387dd2c99"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte2 Frame Error.  <a href="#gae0c10001ad4dd9794de2de3387dd2c99">More...</a><br/></td></tr>
<tr class="separator:gae0c10001ad4dd9794de2de3387dd2c99"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeda8e4c0a58e4a655e874948cb7e2db4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaeda8e4c0a58e4a655e874948cb7e2db4">XUARTPS_RXBS_BYTE2_PARE</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:gaeda8e4c0a58e4a655e874948cb7e2db4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte2 Parity Error.  <a href="#gaeda8e4c0a58e4a655e874948cb7e2db4">More...</a><br/></td></tr>
<tr class="separator:gaeda8e4c0a58e4a655e874948cb7e2db4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga84dea42f85ba727bf8efc90ca98e8b1f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga84dea42f85ba727bf8efc90ca98e8b1f">XUARTPS_RXBS_BYTE1_BRKE</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:ga84dea42f85ba727bf8efc90ca98e8b1f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte1 Break Error.  <a href="#ga84dea42f85ba727bf8efc90ca98e8b1f">More...</a><br/></td></tr>
<tr class="separator:ga84dea42f85ba727bf8efc90ca98e8b1f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabfe6a00c27c48bfee66181c83214e8be"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gabfe6a00c27c48bfee66181c83214e8be">XUARTPS_RXBS_BYTE1_FRME</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:gabfe6a00c27c48bfee66181c83214e8be"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte1 Frame Error.  <a href="#gabfe6a00c27c48bfee66181c83214e8be">More...</a><br/></td></tr>
<tr class="separator:gabfe6a00c27c48bfee66181c83214e8be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga44cae6b2e96f17f7556f569f03017e45"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga44cae6b2e96f17f7556f569f03017e45">XUARTPS_RXBS_BYTE1_PARE</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:ga44cae6b2e96f17f7556f569f03017e45"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte1 Parity Error.  <a href="#ga44cae6b2e96f17f7556f569f03017e45">More...</a><br/></td></tr>
<tr class="separator:ga44cae6b2e96f17f7556f569f03017e45"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d1b291588997d03d0fe4a107db31d5f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga8d1b291588997d03d0fe4a107db31d5f">XUARTPS_RXBS_BYTE0_BRKE</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:ga8d1b291588997d03d0fe4a107db31d5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte0 Break Error.  <a href="#ga8d1b291588997d03d0fe4a107db31d5f">More...</a><br/></td></tr>
<tr class="separator:ga8d1b291588997d03d0fe4a107db31d5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5f24c98437ec9ca72a3b9777c5e96a84"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#ga5f24c98437ec9ca72a3b9777c5e96a84">XUARTPS_RXBS_BYTE0_FRME</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga5f24c98437ec9ca72a3b9777c5e96a84"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte0 Frame Error.  <a href="#ga5f24c98437ec9ca72a3b9777c5e96a84">More...</a><br/></td></tr>
<tr class="separator:ga5f24c98437ec9ca72a3b9777c5e96a84"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeb95a2a53d101d8256ffbe8165233307"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gaeb95a2a53d101d8256ffbe8165233307">XUARTPS_RXBS_BYTE0_PARE</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:gaeb95a2a53d101d8256ffbe8165233307"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte0 Parity Error.  <a href="#gaeb95a2a53d101d8256ffbe8165233307">More...</a><br/></td></tr>
<tr class="separator:gaeb95a2a53d101d8256ffbe8165233307"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad270e6c5e81ad53fe663527ce2292e7c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__uartps.html#gad270e6c5e81ad53fe663527ce2292e7c">XUARTPS_RXBS_MASK</a>&#160;&#160;&#160;0x00000007U</td></tr>
<tr class="memdesc:gad270e6c5e81ad53fe663527ce2292e7c"><td class="mdescLeft">&#160;</td><td class="mdescRight">3 bit RX byte status mask  <a href="#gad270e6c5e81ad53fe663527ce2292e7c">More...</a><br/></td></tr>
<tr class="separator:gad270e6c5e81ad53fe663527ce2292e7c"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="ga2f0a6417e12aa122e287fe313c03a399"></a>
<div class="memitem">
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          <td class="memname">#define TIMEOUT_VAL&#160;&#160;&#160;1000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Wait for 1 sec in worst case. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>.</p>

</div>
</div>
<a class="anchor" id="ga0994c9a85c14e41d593f7ced18d73325"></a>
<div class="memitem">
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          <td class="memname">#define XUARTPS_BAUDDIV_MASK&#160;&#160;&#160;0x000000FFU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>8 bit baud divider mask </p>

</div>
</div>
<a class="anchor" id="ga18d29d65e26d6c7c192464dbf88aeb55"></a>
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          <td class="memname">#define XUARTPS_BAUDDIV_OFFSET&#160;&#160;&#160;0x0034U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Baud Rate Divider [7:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, and <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>.</p>

</div>
</div>
<a class="anchor" id="gaae81b813494b51dffc97f265ccc8bc1b"></a>
<div class="memitem">
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          <td class="memname">#define XUARTPS_BAUDDIV_RESET_VAL&#160;&#160;&#160;0x0000000FU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reset value. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="ga19279c6968bf5936d9af320ff2c3c404"></a>
<div class="memitem">
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          <td class="memname">#define XUARTPS_BAUDGEN_DISABLE&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Disable clock. </p>

</div>
</div>
<a class="anchor" id="ga3140f225a4fafc91ca8f5cdafb35d84a"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XUARTPS_BAUDGEN_MASK&#160;&#160;&#160;0x0000FFFFU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Valid bits mask. </p>

</div>
</div>
<a class="anchor" id="ga77bb5a0dfa2f1e62cf75c0972e889e92"></a>
<div class="memitem">
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          <td class="memname">#define XUARTPS_BAUDGEN_OFFSET&#160;&#160;&#160;0x0018U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Baud Rate Generator [15:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, and <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>.</p>

</div>
</div>
<a class="anchor" id="ga0df74dbc1f99f853eac534c58465c67c"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XUARTPS_BAUDGEN_RESET_VAL&#160;&#160;&#160;0x0000028BU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reset value. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="gae297afa5ad30bb459ae92c6289bf24d3"></a>
<div class="memitem">
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          <td class="memname">#define XUARTPS_CR_EN_DIS_MASK&#160;&#160;&#160;0x0000003CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Enable/disable Mask. </p>

<p>Referenced by <a class="el" href="xuartps__low__echo__example_8c.html#a012e79e774af8eeb985f9fdfac38de37">UartPsEchoExample()</a>.</p>

</div>
</div>
<a class="anchor" id="ga90a3cb2c33dba6a5b888f7324d1c5135"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XUARTPS_CR_OFFSET&#160;&#160;&#160;0x0000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Control Register [8:0]. </p>

<p>Referenced by <a class="el" href="xuartps__low__echo__example_8c.html#a012e79e774af8eeb985f9fdfac38de37">UartPsEchoExample()</a>, <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>, and <a class="el" href="group__uartps.html#ga75f0201ac3749384f29171565410a8df">XUartPs_SetRecvTimeout()</a>.</p>

</div>
</div>
<a class="anchor" id="gaffa7bb80501ee66683ce853436190ea9"></a>
<div class="memitem">
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          <td class="memname">#define XUARTPS_CR_RX_DIS&#160;&#160;&#160;0x00000008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX disabled. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="ga31a05c9637d59b0631b43758a78d605e"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_CR_RX_EN&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX enabled. </p>

<p>Referenced by <a class="el" href="xuartps__low__echo__example_8c.html#a012e79e774af8eeb985f9fdfac38de37">UartPsEchoExample()</a>.</p>

</div>
</div>
<a class="anchor" id="ga659be76f18f938134bbe4e8c0e26159b"></a>
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        <tr>
          <td class="memname">#define XUARTPS_CR_RXRST&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX logic reset. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, and <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>.</p>

</div>
</div>
<a class="anchor" id="gafb47359849b90befe1daa9b8b571cd41"></a>
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          <td class="memname">#define XUARTPS_CR_STARTBRK&#160;&#160;&#160;0x00000080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Set break. </p>

</div>
</div>
<a class="anchor" id="ga997014ffed40da258769e496544cad9f"></a>
<div class="memitem">
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          <td class="memname">#define XUARTPS_CR_STOPBRK&#160;&#160;&#160;0x00000100U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Stop transmission of break. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, and <a class="el" href="group__uartps.html#ga6c7c0ef55459866990d4a17fbb620ba6">XUartPs_SetOptions()</a>.</p>

</div>
</div>
<a class="anchor" id="ga3fbd9a70a2d90299418dd9b5a16b94d9"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XUARTPS_CR_TORST&#160;&#160;&#160;0x00000040U</td>
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      </table>
</div><div class="memdoc">

<p>RX timeout counter restart. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga75f0201ac3749384f29171565410a8df">XUartPs_SetRecvTimeout()</a>.</p>

</div>
</div>
<a class="anchor" id="ga4831dbafe987c3286b022f3ab937bc9a"></a>
<div class="memitem">
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          <td class="memname">#define XUARTPS_CR_TX_DIS&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>TX disabled. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf22f08ec08cbe06a53efbd44a43b8096"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XUARTPS_CR_TX_EN&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>TX enabled. </p>

<p>Referenced by <a class="el" href="xuartps__low__echo__example_8c.html#a012e79e774af8eeb985f9fdfac38de37">UartPsEchoExample()</a>.</p>

</div>
</div>
<a class="anchor" id="ga1859f5cbbdbf0a83eff49960ccc342e2"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XUARTPS_CR_TXRST&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>TX logic reset. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, and <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>.</p>

</div>
</div>
<a class="anchor" id="gaa8604eeb6cd5c80a3a54ef5510bd46ff"></a>
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          <td class="memname">#define XUartPs_DisableUart</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">Xil_Out32(((InstancePtr)-&gt;Config.BaseAddress + (u32)<a class="code" href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a>), \</div>
<div class="line">          (((Xil_In32((InstancePtr)-&gt;Config.BaseAddress + (u32)XUARTPS_CR_OFFSET)) &amp; \</div>
<div class="line">          (u32)(~<a class="code" href="group__uartps.html#gae297afa5ad30bb459ae92c6289bf24d3">XUARTPS_CR_EN_DIS_MASK</a>)) | ((u32)<a class="code" href="group__uartps.html#gaffa7bb80501ee66683ce853436190ea9">XUARTPS_CR_RX_DIS</a> | (u32)<a class="code" href="group__uartps.html#ga4831dbafe987c3286b022f3ab937bc9a">XUARTPS_CR_TX_DIS</a>)))</div>
<div class="ttc" id="group__uartps_html_gae297afa5ad30bb459ae92c6289bf24d3"><div class="ttname"><a href="group__uartps.html#gae297afa5ad30bb459ae92c6289bf24d3">XUARTPS_CR_EN_DIS_MASK</a></div><div class="ttdeci">#define XUARTPS_CR_EN_DIS_MASK</div><div class="ttdoc">Enable/disable Mask. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:95</div></div>
<div class="ttc" id="group__uartps_html_gaffa7bb80501ee66683ce853436190ea9"><div class="ttname"><a href="group__uartps.html#gaffa7bb80501ee66683ce853436190ea9">XUARTPS_CR_RX_DIS</a></div><div class="ttdeci">#define XUARTPS_CR_RX_DIS</div><div class="ttdoc">RX disabled. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:93</div></div>
<div class="ttc" id="group__uartps_html_ga4831dbafe987c3286b022f3ab937bc9a"><div class="ttname"><a href="group__uartps.html#ga4831dbafe987c3286b022f3ab937bc9a">XUARTPS_CR_TX_DIS</a></div><div class="ttdeci">#define XUARTPS_CR_TX_DIS</div><div class="ttdoc">TX disabled. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:91</div></div>
<div class="ttc" id="group__uartps_html_ga90a3cb2c33dba6a5b888f7324d1c5135"><div class="ttname"><a href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a></div><div class="ttdeci">#define XUARTPS_CR_OFFSET</div><div class="ttdoc">Control Register [8:0]. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:62</div></div>
</div><!-- fragment -->
<p>Disable the transmitter and receiver of the UART. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: void <a class="el" href="group__uartps.html#gaa8604eeb6cd5c80a3a54ef5510bd46ff" title="Disable the transmitter and receiver of the UART. ">XUartPs_DisableUart(XUartPs *InstancePtr)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>.</p>

</div>
</div>
<a class="anchor" id="ga800f448c280504c1c8e3a0e2cea28699"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUartPs_EnableUart</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">Xil_Out32(((InstancePtr)-&gt;Config.BaseAddress + (u32)<a class="code" href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a>), \</div>
<div class="line">          ((Xil_In32((InstancePtr)-&gt;Config.BaseAddress + (u32)XUARTPS_CR_OFFSET) &amp; \</div>
<div class="line">          (u32)(~<a class="code" href="group__uartps.html#gae297afa5ad30bb459ae92c6289bf24d3">XUARTPS_CR_EN_DIS_MASK</a>)) | ((u32)<a class="code" href="group__uartps.html#ga31a05c9637d59b0631b43758a78d605e">XUARTPS_CR_RX_EN</a> | (u32)<a class="code" href="group__uartps.html#gaf22f08ec08cbe06a53efbd44a43b8096">XUARTPS_CR_TX_EN</a>)))</div>
<div class="ttc" id="group__uartps_html_gae297afa5ad30bb459ae92c6289bf24d3"><div class="ttname"><a href="group__uartps.html#gae297afa5ad30bb459ae92c6289bf24d3">XUARTPS_CR_EN_DIS_MASK</a></div><div class="ttdeci">#define XUARTPS_CR_EN_DIS_MASK</div><div class="ttdoc">Enable/disable Mask. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:95</div></div>
<div class="ttc" id="group__uartps_html_gaf22f08ec08cbe06a53efbd44a43b8096"><div class="ttname"><a href="group__uartps.html#gaf22f08ec08cbe06a53efbd44a43b8096">XUARTPS_CR_TX_EN</a></div><div class="ttdeci">#define XUARTPS_CR_TX_EN</div><div class="ttdoc">TX enabled. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:92</div></div>
<div class="ttc" id="group__uartps_html_ga31a05c9637d59b0631b43758a78d605e"><div class="ttname"><a href="group__uartps.html#ga31a05c9637d59b0631b43758a78d605e">XUARTPS_CR_RX_EN</a></div><div class="ttdeci">#define XUARTPS_CR_RX_EN</div><div class="ttdoc">RX enabled. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:94</div></div>
<div class="ttc" id="group__uartps_html_ga90a3cb2c33dba6a5b888f7324d1c5135"><div class="ttname"><a href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a></div><div class="ttdeci">#define XUARTPS_CR_OFFSET</div><div class="ttdoc">Control Register [8:0]. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:62</div></div>
</div><!-- fragment -->
<p>Enable the transmitter and receiver of the UART. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: void <a class="el" href="group__uartps.html#ga800f448c280504c1c8e3a0e2cea28699" title="Enable the transmitter and receiver of the UART. ">XUartPs_EnableUart(XUartPs *InstancePtr)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>.</p>

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<a class="anchor" id="ga9cd187ec1b79c1ec7daf4c7293d2bdd0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_EVENT_MODEM&#160;&#160;&#160;5U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Modem status changed. </p>

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<div class="memproto">
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          <td class="memname">#define XUARTPS_EVENT_PARE_FRAME_BRKE&#160;&#160;&#160;6U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>A receive parity, frame, break error detected. </p>

</div>
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<a class="anchor" id="ga5df58daf8b254add987548848166a4ea"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_EVENT_RECV_DATA&#160;&#160;&#160;1U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data receiving done. </p>

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<a class="anchor" id="ga4664232aba4f5873439dd72b68cea266"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_EVENT_RECV_ERROR&#160;&#160;&#160;4U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>A receive error detected. </p>

</div>
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<a class="anchor" id="ga1371facb57f230f8c3516c95d50db6f0"></a>
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<div class="memproto">
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          <td class="memname">#define XUARTPS_EVENT_RECV_ORERR&#160;&#160;&#160;7U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>A receive overrun error detected. </p>

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<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_EVENT_RECV_TOUT&#160;&#160;&#160;2U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>A receive timeout occurred. </p>

</div>
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<a class="anchor" id="ga83784b7f23f91b771059aac0125b20a6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_EVENT_SENT_DATA&#160;&#160;&#160;3U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data transmission done. </p>

</div>
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<a class="anchor" id="ga12e256a5c0dd76b4c3ce5952382a0400"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_FIFO_OFFSET&#160;&#160;&#160;0x0030U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>FIFO [7:0]. </p>

<p>Referenced by <a class="el" href="xuartps__low__echo__example_8c.html#a012e79e774af8eeb985f9fdfac38de37">UartPsEchoExample()</a>, <a class="el" href="group__uartps.html#ga60240486c69f6167ab13194ced5e8bb7">XUartPs_RecvByte()</a>, and <a class="el" href="group__uartps.html#ga4bae0ee4df836a8c3e7748c9ae28ebee">XUartPs_SendByte()</a>.</p>

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<a class="anchor" id="ga6b7df91642929dda91d4098ed126134c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_FLOWDEL_MASK&#160;&#160;&#160;<a class="el" href="group__uartps.html#ga0b1b76b99179a02db9e22d6c290765fd">XUARTPS_RXWM_MASK</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Valid bit mask. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga2127a5ae7ea617f1fb1a3415e35f1387">XUartPs_GetFlowDelay()</a>, and <a class="el" href="group__uartps.html#ga0e5c270f7abd4a00f629a638feb2e68e">XUartPs_SetFlowDelay()</a>.</p>

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<a class="anchor" id="ga7d02d59e19b92baf8fa69dc24833f8a2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_FLOWDEL_OFFSET&#160;&#160;&#160;0x0038U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Flow Delay [5:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga2127a5ae7ea617f1fb1a3415e35f1387">XUartPs_GetFlowDelay()</a>, and <a class="el" href="group__uartps.html#ga0e5c270f7abd4a00f629a638feb2e68e">XUartPs_SetFlowDelay()</a>.</p>

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<a class="anchor" id="ga50680fd4482bdc2b03553ada9af6dbe0"></a>
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<div class="memproto">
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          <td class="memname">#define XUARTPS_FORMAT_1_5_STOP_BIT&#160;&#160;&#160;1U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>1.5 stop bits </p>

</div>
</div>
<a class="anchor" id="gaaacb7c80da54a350343e8deb0d894371"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_FORMAT_1_STOP_BIT&#160;&#160;&#160;0U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>1 stop bit </p>

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<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_FORMAT_2_STOP_BIT&#160;&#160;&#160;2U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>2 stop bits </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>.</p>

</div>
</div>
<a class="anchor" id="ga18409691f005bcf4524c5d5b4eef8bc9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_FORMAT_6_BITS&#160;&#160;&#160;3U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>6 data bits </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>.</p>

</div>
</div>
<a class="anchor" id="gae5c2f638e6460a0be3c85f89309ab7dd"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_FORMAT_7_BITS&#160;&#160;&#160;2U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>7 data bits </p>

</div>
</div>
<a class="anchor" id="gaa4cfce89f6bb9673aca6917c44f374b1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_FORMAT_8_BITS&#160;&#160;&#160;0U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>8 data bits </p>

</div>
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<a class="anchor" id="ga25c1bf78c37b79d68c4094dca8e2aa2c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_FORMAT_EVEN_PARITY&#160;&#160;&#160;0U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Even parity. </p>

</div>
</div>
<a class="anchor" id="ga2e8f4dd84f661a7eee839a6b07611b1b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_FORMAT_MARK_PARITY&#160;&#160;&#160;3U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mark parity. </p>

</div>
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<a class="anchor" id="gadacbaf7f47beeebb7301b6d50b74f6c1"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_FORMAT_NO_PARITY&#160;&#160;&#160;4U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>No parity. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>.</p>

</div>
</div>
<a class="anchor" id="ga86879c57efb1b9351a5ee4f7043054dc"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_FORMAT_ODD_PARITY&#160;&#160;&#160;1U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Odd parity. </p>

</div>
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<a class="anchor" id="gab23f88cb97896fab3586f9a90145e559"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_FORMAT_SPACE_PARITY&#160;&#160;&#160;2U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>parity </p>

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</div>
<a class="anchor" id="ga8c50cd4a1f7a342dcdf6d7ab1640b1b9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUartPs_GetChannelStatus</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td>&#160;&#160;&#160;Xil_In32(((InstancePtr)-&gt;Config.BaseAddress) + (u32)<a class="el" href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a>)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Get the UART Channel Status Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The value read from the register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u16 <a class="el" href="group__uartps.html#ga8c50cd4a1f7a342dcdf6d7ab1640b1b9" title="Get the UART Channel Status Register. ">XUartPs_GetChannelStatus(XUartPs *InstancePtr)</a> </dd></dl>

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<a class="anchor" id="gacd6fb80e110f22c2d305c3152cbe9e22"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XUartPs_GetModeControl</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td>&#160;&#160;&#160;Xil_In32(((InstancePtr)-&gt;Config.BaseAddress) + (u32)<a class="el" href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a>)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Get the UART Mode Control Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The value read from the register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 XUartPs_GetControl(XUartPs *InstancePtr) </dd></dl>

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<a class="anchor" id="ga7e39d2ae49038a4ce4087bbee2bfdab7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_IDR_OFFSET&#160;&#160;&#160;0x000CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Interrupt Disable [12:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>, <a class="el" href="group__uartps.html#gadc16932076b99cd747e702dcbecd102b">XUartPs_Recv()</a>, <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>, <a class="el" href="group__uartps.html#ga17b3e12a296eecf17be4a4b8583576e7">XUartPs_Send()</a>, and <a class="el" href="group__uartps.html#gab3b65e926f6f4ac7ab41a70801ba12c3">XUartPs_SetInterruptMask()</a>.</p>

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<a class="anchor" id="ga50985f0d8e60110fbbc63b1e100beb68"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_IER_OFFSET&#160;&#160;&#160;0x0008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Interrupt Enable [12:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#gadc16932076b99cd747e702dcbecd102b">XUartPs_Recv()</a>, <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>, and <a class="el" href="group__uartps.html#gab3b65e926f6f4ac7ab41a70801ba12c3">XUartPs_SetInterruptMask()</a>.</p>

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<a class="anchor" id="ga0cfdb73d2795d7cc3b849fe1622fa029"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_IMR_OFFSET&#160;&#160;&#160;0x0010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Interrupt Mask [12:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#gae5cf497a416bc210c4f1dbe99cacc961">XUartPs_GetInterruptMask()</a>, <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>, <a class="el" href="group__uartps.html#gadc16932076b99cd747e702dcbecd102b">XUartPs_Recv()</a>, and <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>.</p>

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</div>
<a class="anchor" id="ga7e96d23606d96a7d9816bc2ff777cbf8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_ISR_OFFSET&#160;&#160;&#160;0x0014U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Interrupt Status [12:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>, and <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>.</p>

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<a class="anchor" id="gac8b8f06d10cf178227ce88c140d78eb4"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XUartPs_IsReceiveData</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">!((Xil_In32((BaseAddress) + <a class="code" href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a>) &amp;        \</div>
<div class="line">        (u32)<a class="code" href="group__uartps.html#gad604ae6739b459eb76fd3515d3d4f249">XUARTPS_SR_RXEMPTY</a>) == (u32)<a class="code" href="group__uartps.html#gad604ae6739b459eb76fd3515d3d4f249">XUARTPS_SR_RXEMPTY</a>)</div>
<div class="ttc" id="group__uartps_html_ga342083b04c2f9d589d7dcb1d40b329f6"><div class="ttname"><a href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a></div><div class="ttdeci">#define XUARTPS_SR_OFFSET</div><div class="ttdoc">Channel Status [14:0]. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:73</div></div>
<div class="ttc" id="group__uartps_html_gad604ae6739b459eb76fd3515d3d4f249"><div class="ttname"><a href="group__uartps.html#gad604ae6739b459eb76fd3515d3d4f249">XUARTPS_SR_RXEMPTY</a></div><div class="ttdeci">#define XUARTPS_SR_RXEMPTY</div><div class="ttdoc">RX FIFO empty. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:284</div></div>
</div><!-- fragment -->
<p>Determine if there is receive data in the receiver and/or FIFO. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>contains the base address of the device.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>TRUE if there is receive data, FALSE otherwise.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 <a class="el" href="group__uartps.html#gac8b8f06d10cf178227ce88c140d78eb4" title="Determine if there is receive data in the receiver and/or FIFO. ">XUartPs_IsReceiveData(u32 BaseAddress)</a> </dd></dl>

<p>Referenced by <a class="el" href="xuartps__low__echo__example_8c.html#a012e79e774af8eeb985f9fdfac38de37">UartPsEchoExample()</a>, and <a class="el" href="group__uartps.html#ga60240486c69f6167ab13194ced5e8bb7">XUartPs_RecvByte()</a>.</p>

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<a class="anchor" id="gaa34f1217cdc0b14977fbe3a22ec167ee"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUartPs_IsTransmitActive</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">((Xil_In32((BaseAddress) + <a class="code" href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a>) &amp;         \</div>
<div class="line">         (u32)<a class="code" href="group__uartps.html#ga5032d2efd70379e4c525816c0f75c724">XUARTPS_SR_TACTIVE</a>) == (u32)<a class="code" href="group__uartps.html#ga5032d2efd70379e4c525816c0f75c724">XUARTPS_SR_TACTIVE</a>)</div>
<div class="ttc" id="group__uartps_html_ga342083b04c2f9d589d7dcb1d40b329f6"><div class="ttname"><a href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a></div><div class="ttdeci">#define XUARTPS_SR_OFFSET</div><div class="ttdoc">Channel Status [14:0]. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:73</div></div>
<div class="ttc" id="group__uartps_html_ga5032d2efd70379e4c525816c0f75c724"><div class="ttname"><a href="group__uartps.html#ga5032d2efd70379e4c525816c0f75c724">XUARTPS_SR_TACTIVE</a></div><div class="ttdeci">#define XUARTPS_SR_TACTIVE</div><div class="ttdoc">TX active. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:279</div></div>
</div><!-- fragment -->
<p>Check if transmission state machine is active. </p>
<dl class="section return"><dt>Returns</dt><dd>TRUE if the TX state machine is active, FALSE if Tx state machine is In-active</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 <a class="el" href="group__uartps.html#gaa34f1217cdc0b14977fbe3a22ec167ee" title="Check if transmission state machine is active. ">XUartPs_IsTransmitActive(u32 BaseAddress)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__uartps.html#gaf789b78ee831825f3131f9a016e15044">XUartPs_WaitTransmitDone()</a>.</p>

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</div>
<a class="anchor" id="ga9a3d03d5794a4d8cdda2fa2c4ba8e174"></a>
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          <td class="memname">#define XUartPs_IsTransmitEmpty</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">((Xil_In32(((InstancePtr)-&gt;Config.BaseAddress) + (u32)<a class="code" href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a>) &amp; \</div>
<div class="line">         (u32)<a class="code" href="group__uartps.html#ga4eb9c1b9ceaf7aecb36d43c983edbe95">XUARTPS_SR_TXEMPTY</a>) == (u32)<a class="code" href="group__uartps.html#ga4eb9c1b9ceaf7aecb36d43c983edbe95">XUARTPS_SR_TXEMPTY</a>)</div>
<div class="ttc" id="group__uartps_html_ga342083b04c2f9d589d7dcb1d40b329f6"><div class="ttname"><a href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a></div><div class="ttdeci">#define XUARTPS_SR_OFFSET</div><div class="ttdoc">Channel Status [14:0]. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:73</div></div>
<div class="ttc" id="group__uartps_html_ga4eb9c1b9ceaf7aecb36d43c983edbe95"><div class="ttname"><a href="group__uartps.html#ga4eb9c1b9ceaf7aecb36d43c983edbe95">XUARTPS_SR_TXEMPTY</a></div><div class="ttdeci">#define XUARTPS_SR_TXEMPTY</div><div class="ttdoc">TX FIFO empty. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:282</div></div>
</div><!-- fragment -->
<p>Determine if the transmitter FIFO is empty. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE if a byte can be sent</li>
<li>FALSE if the Transmitter Fifo is not empty</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 <a class="el" href="group__uartps.html#ga9a3d03d5794a4d8cdda2fa2c4ba8e174" title="Determine if the transmitter FIFO is empty. ">XUartPs_IsTransmitEmpty(XUartPs InstancePtr)</a> </dd></dl>

</div>
</div>
<a class="anchor" id="ga8170a2befa118c8bd2ccc108163c4b7a"></a>
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        <tr>
          <td class="memname">#define XUartPs_IsTransmitFifoEmpty</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">((Xil_In32((BaseAddress) + <a class="code" href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a>) &amp;         \</div>
<div class="line">         (u32)<a class="code" href="group__uartps.html#ga4eb9c1b9ceaf7aecb36d43c983edbe95">XUARTPS_SR_TXEMPTY</a>) == (u32)<a class="code" href="group__uartps.html#ga4eb9c1b9ceaf7aecb36d43c983edbe95">XUARTPS_SR_TXEMPTY</a>)</div>
<div class="ttc" id="group__uartps_html_ga342083b04c2f9d589d7dcb1d40b329f6"><div class="ttname"><a href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a></div><div class="ttdeci">#define XUARTPS_SR_OFFSET</div><div class="ttdoc">Channel Status [14:0]. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:73</div></div>
<div class="ttc" id="group__uartps_html_ga4eb9c1b9ceaf7aecb36d43c983edbe95"><div class="ttname"><a href="group__uartps.html#ga4eb9c1b9ceaf7aecb36d43c983edbe95">XUARTPS_SR_TXEMPTY</a></div><div class="ttdeci">#define XUARTPS_SR_TXEMPTY</div><div class="ttdoc">TX FIFO empty. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:282</div></div>
</div><!-- fragment -->
<p>Check if transmission FIFO is empty. </p>
<dl class="section return"><dt>Returns</dt><dd>TRUE if the TX FIFO is empty, FALSE if Tx FIFO is not empty</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 <a class="el" href="group__uartps.html#ga8170a2befa118c8bd2ccc108163c4b7a" title="Check if transmission FIFO is empty. ">XUartPs_IsTransmitFifoEmpty(u32 BaseAddress)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__uartps.html#gaf789b78ee831825f3131f9a016e15044">XUartPs_WaitTransmitDone()</a>.</p>

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<a class="anchor" id="gaf1507e8d7b12983484a0ab5436a51970"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XUartPs_IsTransmitFull</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">((Xil_In32((BaseAddress) + <a class="code" href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a>) &amp;         \</div>
<div class="line">         (u32)<a class="code" href="group__uartps.html#ga1fe57953aa624e5c7a1c8e20799dc012">XUARTPS_SR_TXFULL</a>) == (u32)<a class="code" href="group__uartps.html#ga1fe57953aa624e5c7a1c8e20799dc012">XUARTPS_SR_TXFULL</a>)</div>
<div class="ttc" id="group__uartps_html_ga342083b04c2f9d589d7dcb1d40b329f6"><div class="ttname"><a href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a></div><div class="ttdeci">#define XUARTPS_SR_OFFSET</div><div class="ttdoc">Channel Status [14:0]. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:73</div></div>
<div class="ttc" id="group__uartps_html_ga1fe57953aa624e5c7a1c8e20799dc012"><div class="ttname"><a href="group__uartps.html#ga1fe57953aa624e5c7a1c8e20799dc012">XUARTPS_SR_TXFULL</a></div><div class="ttdeci">#define XUARTPS_SR_TXFULL</div><div class="ttdoc">TX FIFO full. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:281</div></div>
</div><!-- fragment -->
<p>Determine if a byte of data can be sent with the transmitter. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>contains the base address of the device.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>TRUE if the TX FIFO is full, FALSE if a byte can be put in the FIFO.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 <a class="el" href="group__uartps.html#gaf1507e8d7b12983484a0ab5436a51970" title="Determine if a byte of data can be sent with the transmitter. ">XUartPs_IsTransmitFull(u32 BaseAddress)</a> </dd></dl>

<p>Referenced by <a class="el" href="xuartps__low__echo__example_8c.html#a012e79e774af8eeb985f9fdfac38de37">UartPsEchoExample()</a>, and <a class="el" href="group__uartps.html#ga4bae0ee4df836a8c3e7748c9ae28ebee">XUartPs_SendByte()</a>.</p>

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</div>
<a class="anchor" id="gadf1dabb7547f5b16748e8c6307cfc7a1"></a>
<div class="memitem">
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          <td class="memname">#define XUARTPS_IXR_DMS&#160;&#160;&#160;0x00000200U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Modem status change interrupt. </p>

<p>Referenced by <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gaa6048212fde48f7188efd90c83c4822d"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_IXR_FRAMING&#160;&#160;&#160;0x00000040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Framing error interrupt. </p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, and <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga73b78b2490f8a0aa402867987c765df0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_IXR_MASK&#160;&#160;&#160;0x00003FFFU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Valid bit mask. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>, <a class="el" href="group__uartps.html#gadc16932076b99cd747e702dcbecd102b">XUartPs_Recv()</a>, <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>, and <a class="el" href="group__uartps.html#gab3b65e926f6f4ac7ab41a70801ba12c3">XUartPs_SetInterruptMask()</a>.</p>

</div>
</div>
<a class="anchor" id="gafd4a37077bddeeefcc39d58b4f08fb23"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_IXR_OVER&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Overrun error interrupt. </p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, and <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga2a11620ed0dd465adf0de24f6d7ad418"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_IXR_PARITY&#160;&#160;&#160;0x00000080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Parity error interrupt. </p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, and <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="gab5df3d1fd00008bd7cc177abd02f07e5"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_IXR_RBRK&#160;&#160;&#160;0x00002000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Rx FIFO break detect interrupt. </p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, and <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>.</p>

</div>
</div>
<a class="anchor" id="ga541b132695e333571fd8c6b2eeaa23bd"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_IXR_RXEMPTY&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX FIFO empty interrupt. </p>

<p>Referenced by <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>.</p>

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<a class="anchor" id="gae374cc3c085d3cac795d95b657b03d5e"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_IXR_RXFULL&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX FIFO full interrupt. </p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, and <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>.</p>

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<a class="anchor" id="gaad5de1c646049d7ced8841e316a34892"></a>
<div class="memitem">
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        <tr>
          <td class="memname">#define XUARTPS_IXR_RXOVR&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX FIFO trigger interrupt. </p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, and <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>.</p>

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<a class="anchor" id="gaffe1c724e8882759a6c4fdba948d6a2d"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_IXR_TNFUL&#160;&#160;&#160;0x00000800U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Tx FIFO Nearly Full interrupt. </p>

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<a class="anchor" id="ga7194f5e99a1a98178f6bf1462791aaac"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_IXR_TOUT&#160;&#160;&#160;0x00000100U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Timeout error interrupt. </p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, and <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>.</p>

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</div>
<a class="anchor" id="gace9c111cfb0362f6bb74d5893d3eccaf"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_IXR_TOVR&#160;&#160;&#160;0x00001000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Tx FIFO Overflow interrupt. </p>

</div>
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<a class="anchor" id="ga0432c93dc768cb173d84cc67dd6bbedc"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_IXR_TTRIG&#160;&#160;&#160;0x00000400U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Tx Trig interrupt. </p>

</div>
</div>
<a class="anchor" id="ga9a4207349f3980046ba4ea9e4379007a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_IXR_TXEMPTY&#160;&#160;&#160;0x00000008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>TX FIFO empty interrupt. </p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>, and <a class="el" href="group__uartps.html#ga17b3e12a296eecf17be4a4b8583576e7">XUartPs_Send()</a>.</p>

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<a class="anchor" id="ga9abc091be0a0e2cc18bbc540db6e513b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_IXR_TXFULL&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>TX FIFO full interrupt. </p>

<p>Referenced by <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>, and <a class="el" href="group__uartps.html#ga17b3e12a296eecf17be4a4b8583576e7">XUartPs_Send()</a>.</p>

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<a class="anchor" id="gae32a046cc6b0c46a603b8c30a48312ad"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMCR_DTR&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data terminal ready. </p>

</div>
</div>
<a class="anchor" id="ga664e6b91e03cbb02d76d61b830606746"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMCR_FCM&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Flow control mode. </p>

</div>
</div>
<a class="anchor" id="ga2a501f754853b4aa5aaa151a2b8f8bb7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMCR_OFFSET&#160;&#160;&#160;0x0024U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Modem Control [5:0]. </p>

</div>
</div>
<a class="anchor" id="gae46d78a9b6d4f781341d046bc8647fb1"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMCR_RTS&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Request to send. </p>

</div>
</div>
<a class="anchor" id="ga89fcadc66f14e3e74211f140205acbfa"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMSR_CTS&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Complement of CTS input. </p>

</div>
</div>
<a class="anchor" id="ga95f1f46aa5d8066f272566450016c048"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XUARTPS_MODEMSR_DCD&#160;&#160;&#160;0x00000080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Complement of DCD input. </p>

</div>
</div>
<a class="anchor" id="gabefff2fb8865b052a2452c8dfa29beec"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMSR_DCTS&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Change of CTS. </p>

</div>
</div>
<a class="anchor" id="ga9d0628da915d6e0ec3d9c3aa0f99a6e8"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMSR_DDCD&#160;&#160;&#160;0x00000008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Delta DCD indicator. </p>

</div>
</div>
<a class="anchor" id="ga045cf2ea99ad7e3761cdd44ba234ce07"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMSR_DDSR&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Change of DSR. </p>

</div>
</div>
<a class="anchor" id="ga628d3070bb4cbbef3614c0dee9cb52f4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMSR_DSR&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Complement of DSR input. </p>

</div>
</div>
<a class="anchor" id="ga463d850e21bba14919f9b50dcd20e2a6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMSR_FCMS&#160;&#160;&#160;0x00000100U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Flow control mode (FCMS) </p>

</div>
</div>
<a class="anchor" id="ga36a307fcdb77eba28c8029f92d4db1b9"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMSR_OFFSET&#160;&#160;&#160;0x0028U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Modem Status [8:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga96641d542ac4708a8e3ed5ca2009e10e">XUartPs_GetModemStatus()</a>.</p>

</div>
</div>
<a class="anchor" id="ga98d227162a5e307a8e0f1df5c3055e68"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMSR_RI&#160;&#160;&#160;0x00000040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Complement of RI input. </p>

</div>
</div>
<a class="anchor" id="ga436c976255badb632aca558faac74a5c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MODEMSR_TERI&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Trailing Edge Ring Indicator. </p>

</div>
</div>
<a class="anchor" id="ga36d6b2e37f0201d8e6ecb20ab4835d83"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CCLK&#160;&#160;&#160;0x00000400U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Input clock selection. </p>

</div>
</div>
<a class="anchor" id="ga168dc3bf9cf1fe0d46a1bef522621d90"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CHARLEN_6_BIT&#160;&#160;&#160;0x00000006U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>6 bits data </p>

</div>
</div>
<a class="anchor" id="ga5a506892b297daffb60aafead45870f5"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CHARLEN_7_BIT&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>7 bits data </p>

</div>
</div>
<a class="anchor" id="ga038e90de6132f4e00b64b0f34ff0dfa7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CHARLEN_8_BIT&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>8 bits data </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gae973a7d15eb3f582200a39f3a0444a66"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CHARLEN_MASK&#160;&#160;&#160;0x00000006U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data length mask. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>, <a class="el" href="group__uartps.html#ga3de8ab4e4aca0ba939bc547b5592726c">XUartPs_GetDataFormat()</a>, and <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>.</p>

</div>
</div>
<a class="anchor" id="ga486e6d26bf3570c2f14cdbae2c246648"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CHARLEN_SHIFT&#160;&#160;&#160;1U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Data Length shift. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga3de8ab4e4aca0ba939bc547b5592726c">XUartPs_GetDataFormat()</a>, and <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>.</p>

</div>
</div>
<a class="anchor" id="ga23f5cd17565cb514d2cb651a84b0bd71"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CHMODE_ECHO&#160;&#160;&#160;0x00000100U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Auto echo mode. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>, and <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>.</p>

</div>
</div>
<a class="anchor" id="ga0a3141d2830527a27bf715a0b286936e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CHMODE_L_LOOP&#160;&#160;&#160;0x00000200U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Local loopback mode. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>, <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>, and <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>.</p>

</div>
</div>
<a class="anchor" id="ga3097ef040f183de6a8ba8b4cedf64ccf"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CHMODE_MASK&#160;&#160;&#160;0x00000300U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mode mask. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>, <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>, and <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>.</p>

</div>
</div>
<a class="anchor" id="gab9c582f58d3628334fa95502f7532c81"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CHMODE_NORM&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Normal mode. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>, <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, and <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>.</p>

</div>
</div>
<a class="anchor" id="gadbf78ca00f2906f2b1334c1daa9e8688"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CHMODE_R_LOOP&#160;&#160;&#160;0x00000300U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Remote loopback mode. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>, and <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>.</p>

</div>
</div>
<a class="anchor" id="ga5ed18906d4a19e7f047705902342e758"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CHMODE_SHIFT&#160;&#160;&#160;8U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mode shift. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>.</p>

</div>
</div>
<a class="anchor" id="gac383c8056146a93a6113ce9a05501ffd"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_CLKSEL&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Input clock selection. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>.</p>

</div>
</div>
<a class="anchor" id="gad4932468a404b116c0e56b496b906716"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_OFFSET&#160;&#160;&#160;0x0004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mode Register [9:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>, <a class="el" href="group__uartps.html#ga3de8ab4e4aca0ba939bc547b5592726c">XUartPs_GetDataFormat()</a>, <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>, <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>, <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>, <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>, and <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>.</p>

</div>
</div>
<a class="anchor" id="ga7321956b668fe79c2d2c399a203b7af3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_PARITY_EVEN&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Even parity mode. </p>

</div>
</div>
<a class="anchor" id="ga6485b62e7ab5675f8875b04f934cce5a"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_PARITY_MARK&#160;&#160;&#160;0x00000018U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Mark parity mode. </p>

</div>
</div>
<a class="anchor" id="ga062f61f5b1d33404b4328d15a4010f5c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_PARITY_MASK&#160;&#160;&#160;0x00000038U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Parity mask. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>, <a class="el" href="group__uartps.html#ga3de8ab4e4aca0ba939bc547b5592726c">XUartPs_GetDataFormat()</a>, and <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>.</p>

</div>
</div>
<a class="anchor" id="ga708588a4f5ec6e1b8728268dd0d6ba73"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_PARITY_NONE&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>No parity mode. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gad1dbc37545c9dd9b402ebde975ce568f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_PARITY_ODD&#160;&#160;&#160;0x00000008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Odd parity mode. </p>

</div>
</div>
<a class="anchor" id="ga81a8d9730a5ec55902869c011d07433e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_PARITY_SHIFT&#160;&#160;&#160;3U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Parity setting shift. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga3de8ab4e4aca0ba939bc547b5592726c">XUartPs_GetDataFormat()</a>, and <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>.</p>

</div>
</div>
<a class="anchor" id="ga332257f88a1089025cfa6c721b268e53"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_PARITY_SPACE&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Space parity mode. </p>

</div>
</div>
<a class="anchor" id="ga1f97e278219f4c7e2dd04f586713539d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_STOPMODE_1_5_BIT&#160;&#160;&#160;0x00000040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>1.5 stop bits </p>

</div>
</div>
<a class="anchor" id="ga3b4e88eab034a961b86ab592369fb766"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_STOPMODE_1_BIT&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>1 stop bit </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>.</p>

</div>
</div>
<a class="anchor" id="gac84dacebc9843a8f520379faa06ba5ac"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_STOPMODE_2_BIT&#160;&#160;&#160;0x00000080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>2 stop bits </p>

</div>
</div>
<a class="anchor" id="gadc83d5b2b747a1d1eac63c5067cf0e88"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_STOPMODE_MASK&#160;&#160;&#160;0x000000A0U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Stop bits mask. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>, <a class="el" href="group__uartps.html#ga3de8ab4e4aca0ba939bc547b5592726c">XUartPs_GetDataFormat()</a>, and <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>.</p>

</div>
</div>
<a class="anchor" id="ga26f962080857bd73db4cd09de29d1140"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_MR_STOPMODE_SHIFT&#160;&#160;&#160;6U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Stop bits shift. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga3de8ab4e4aca0ba939bc547b5592726c">XUartPs_GetDataFormat()</a>, and <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>.</p>

</div>
</div>
<a class="anchor" id="ga59bf55affd72ca3bd5824c921926527b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPER_MODE_AUTO_ECHO&#160;&#160;&#160;(u8)0x01U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Auto Echo Mode. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>, and <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>.</p>

</div>
</div>
<a class="anchor" id="ga3a71908d40b06c097599a5a29d61e800"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPER_MODE_LOCAL_LOOP&#160;&#160;&#160;(u8)0x02U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Local Loopback Mode. </p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, <a class="el" href="xuartps__polled__example_8c.html#a52331ffc09dfe878421dee5145ce6109">UartPsPolledExample()</a>, <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>, and <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>.</p>

</div>
</div>
<a class="anchor" id="ga9d916026363230478a8c8729e23f3352"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPER_MODE_NORMAL&#160;&#160;&#160;(u8)0x00U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Normal Mode. </p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, <a class="el" href="xuartps__polled__example_8c.html#a52331ffc09dfe878421dee5145ce6109">UartPsPolledExample()</a>, <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>, and <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>.</p>

</div>
</div>
<a class="anchor" id="ga5e25847001737185c8359cda12524e35"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPER_MODE_REMOTE_LOOP&#160;&#160;&#160;(u8)0x03U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Remote Loopback Mode. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>, and <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>.</p>

</div>
</div>
<a class="anchor" id="gaf4a6f1baf50c915e70d371de1efe6415"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPTION_ASSERT_DTR&#160;&#160;&#160;0x0002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Assert the DTR bit. </p>

</div>
</div>
<a class="anchor" id="ga1f0e4e7525d49994044895137b0d6c25"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPTION_ASSERT_RTS&#160;&#160;&#160;0x0004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Assert the RTS bit. </p>

</div>
</div>
<a class="anchor" id="ga3e8595042a9f15536cf9ab4d55ea4a94"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPTION_RESET_RX&#160;&#160;&#160;0x0008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reset the receiver. </p>

</div>
</div>
<a class="anchor" id="gaeba0f9aa648285d5e2d56d38d1f77094"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPTION_RESET_TMOUT&#160;&#160;&#160;0x0020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reset the receive timeout. </p>

</div>
</div>
<a class="anchor" id="gac85b9de79808c7ce7b92a748d7fdb5e2"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPTION_RESET_TX&#160;&#160;&#160;0x0010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reset the transmitter. </p>

</div>
</div>
<a class="anchor" id="ga5073a0aa7bef53cb44206fa6146b9a86"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPTION_SET_BREAK&#160;&#160;&#160;0x0080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>These constants specify the options that may be set or retrieved with the driver, each is a unique bit mask such that multiple options may be specified. </p>
<p>These constants indicate the available options in active state.Starts break transmission </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga6c7c0ef55459866990d4a17fbb620ba6">XUartPs_SetOptions()</a>.</p>

</div>
</div>
<a class="anchor" id="gad74cdb596f414bee06ebd9159f496cef"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPTION_SET_FCM&#160;&#160;&#160;0x0001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Turn on flow control mode. </p>

</div>
</div>
<a class="anchor" id="ga15a737d7e5baf7a08693aed5599f49c3"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_OPTION_STOP_BREAK&#160;&#160;&#160;0x0040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Stops break transmission. </p>

</div>
</div>
<a class="anchor" id="ga16be7534dc3d678f8abcfeb87e6a4f7e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUartPs_ReadReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;Xil_In32((BaseAddress) + (u32)(RegOffset))</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Read a UART register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>contains the base address of the device. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>contains the offset from the base address of the device.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The value read from the register.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: u32 <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e" title="Read a UART register. ">XUartPs_ReadReg(u32 BaseAddress, int RegOffset)</a> </dd></dl>

<p>Referenced by <a class="el" href="xuartps__low__echo__example_8c.html#a012e79e774af8eeb985f9fdfac38de37">UartPsEchoExample()</a>, <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>, <a class="el" href="group__uartps.html#ga3de8ab4e4aca0ba939bc547b5592726c">XUartPs_GetDataFormat()</a>, <a class="el" href="group__uartps.html#ga61db893485f1c77f27abc6d8a4ff1ed7">XUartPs_GetFifoThreshold()</a>, <a class="el" href="group__uartps.html#ga2127a5ae7ea617f1fb1a3415e35f1387">XUartPs_GetFlowDelay()</a>, <a class="el" href="group__uartps.html#gae5cf497a416bc210c4f1dbe99cacc961">XUartPs_GetInterruptMask()</a>, <a class="el" href="group__uartps.html#ga96641d542ac4708a8e3ed5ca2009e10e">XUartPs_GetModemStatus()</a>, <a class="el" href="group__uartps.html#ga67fa9bb06414146652d0ff819bd5852a">XUartPs_GetOperMode()</a>, <a class="el" href="group__uartps.html#ga35d85a106e7af94e903e0795ad94291e">XUartPs_GetOptions()</a>, <a class="el" href="group__uartps.html#gaaa7ea0aca85be0c1eb67ab05de67bc3f">XUartPs_GetRecvTimeout()</a>, <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>, <a class="el" href="group__uartps.html#ga4279fd824eea23f74ad66f165cb0265e">XUartPs_IsSending()</a>, <a class="el" href="group__uartps.html#gadc16932076b99cd747e702dcbecd102b">XUartPs_Recv()</a>, <a class="el" href="group__uartps.html#ga60240486c69f6167ab13194ced5e8bb7">XUartPs_RecvByte()</a>, <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>, <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>, <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>, <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>, <a class="el" href="group__uartps.html#ga6c7c0ef55459866990d4a17fbb620ba6">XUartPs_SetOptions()</a>, and <a class="el" href="group__uartps.html#ga75f0201ac3749384f29171565410a8df">XUartPs_SetRecvTimeout()</a>.</p>

</div>
</div>
<a class="anchor" id="ga8d1b291588997d03d0fe4a107db31d5f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE0_BRKE&#160;&#160;&#160;0x00000004U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte0 Break Error. </p>

</div>
</div>
<a class="anchor" id="ga5f24c98437ec9ca72a3b9777c5e96a84"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE0_FRME&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte0 Frame Error. </p>

</div>
</div>
<a class="anchor" id="gaeb95a2a53d101d8256ffbe8165233307"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE0_PARE&#160;&#160;&#160;0x00000001U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte0 Parity Error. </p>

</div>
</div>
<a class="anchor" id="ga84dea42f85ba727bf8efc90ca98e8b1f"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE1_BRKE&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte1 Break Error. </p>

</div>
</div>
<a class="anchor" id="gabfe6a00c27c48bfee66181c83214e8be"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE1_FRME&#160;&#160;&#160;0x00000010U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte1 Frame Error. </p>

</div>
</div>
<a class="anchor" id="ga44cae6b2e96f17f7556f569f03017e45"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE1_PARE&#160;&#160;&#160;0x00000008U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte1 Parity Error. </p>

</div>
</div>
<a class="anchor" id="gad84d5ed923253797a6afa6c64b4a3dd0"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE2_BRKE&#160;&#160;&#160;0x00000100U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte2 Break Error. </p>

</div>
</div>
<a class="anchor" id="gae0c10001ad4dd9794de2de3387dd2c99"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE2_FRME&#160;&#160;&#160;0x00000080U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte2 Frame Error. </p>

</div>
</div>
<a class="anchor" id="gaeda8e4c0a58e4a655e874948cb7e2db4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE2_PARE&#160;&#160;&#160;0x00000040U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte2 Parity Error. </p>

</div>
</div>
<a class="anchor" id="gaf5abd2b8dd323af05918280deb04058e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE3_BRKE&#160;&#160;&#160;0x00000800U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte3 Break Error. </p>

</div>
</div>
<a class="anchor" id="gac72a6c9ccc3df79e17a97a65eaf18d75"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE3_FRME&#160;&#160;&#160;0x00000400U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte3 Frame Error. </p>

</div>
</div>
<a class="anchor" id="gac5a6ee8b0a568aa4add2089b7d762438"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_BYTE3_PARE&#160;&#160;&#160;0x00000200U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Byte3 Parity Error. </p>

</div>
</div>
<a class="anchor" id="gad270e6c5e81ad53fe663527ce2292e7c"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_MASK&#160;&#160;&#160;0x00000007U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>3 bit RX byte status mask </p>

</div>
</div>
<a class="anchor" id="gad9a37d71fe0f2e6912ad610faae42615"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXBS_OFFSET&#160;&#160;&#160;0x0048U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX FIFO Byte Status [11:0]. </p>

</div>
</div>
<a class="anchor" id="ga9940f0728fcd584c7805eed12531539e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXTOUT_DISABLE&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Disable time out. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="ga391ed6bbae78f486a638f48f539f7755"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXTOUT_MASK&#160;&#160;&#160;0x000000FFU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Valid bits mask. </p>

<p>Referenced by <a class="el" href="group__uartps.html#gaaa7ea0aca85be0c1eb67ab05de67bc3f">XUartPs_GetRecvTimeout()</a>, and <a class="el" href="group__uartps.html#ga75f0201ac3749384f29171565410a8df">XUartPs_SetRecvTimeout()</a>.</p>

</div>
</div>
<a class="anchor" id="ga3370f0abee2b4247e3c4aecda1fd63e7"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXTOUT_OFFSET&#160;&#160;&#160;0x001CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX Timeout [7:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>, <a class="el" href="group__uartps.html#gaaa7ea0aca85be0c1eb67ab05de67bc3f">XUartPs_GetRecvTimeout()</a>, <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, and <a class="el" href="group__uartps.html#ga75f0201ac3749384f29171565410a8df">XUartPs_SetRecvTimeout()</a>.</p>

</div>
</div>
<a class="anchor" id="ga31cf74ecfe8e69ba47c040de1a756417"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXWM_DISABLE&#160;&#160;&#160;0x00000000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Disable RX trigger interrupt. </p>

</div>
</div>
<a class="anchor" id="ga0b1b76b99179a02db9e22d6c290765fd"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXWM_MASK&#160;&#160;&#160;0x0000003FU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Valid bits mask. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga61db893485f1c77f27abc6d8a4ff1ed7">XUartPs_GetFifoThreshold()</a>, and <a class="el" href="group__uartps.html#ga515c53f7e66c34da6b18cc7529cc69a5">XUartPs_SetFifoThreshold()</a>.</p>

</div>
</div>
<a class="anchor" id="gabc29194aeedab160158a6d44c647224e"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXWM_OFFSET&#160;&#160;&#160;0x0020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX FIFO Trigger Level [5:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>, <a class="el" href="group__uartps.html#ga61db893485f1c77f27abc6d8a4ff1ed7">XUartPs_GetFifoThreshold()</a>, <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, and <a class="el" href="group__uartps.html#ga515c53f7e66c34da6b18cc7529cc69a5">XUartPs_SetFifoThreshold()</a>.</p>

</div>
</div>
<a class="anchor" id="gabf1d0d57b5ac837fc55dd128383dcafa"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_RXWM_RESET_VAL&#160;&#160;&#160;0x00000020U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reset value. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>.</p>

</div>
</div>
<a class="anchor" id="gabecf07183bbcaa00778bae5eee856818"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUartPs_SetModeControl</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">InstancePtr, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegisterValue&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">Xil_Out32(((InstancePtr)-&gt;Config.BaseAddress) + (u32)<a class="code" href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a>, \</div>
<div class="line">                        (u32)(RegisterValue))</div>
<div class="ttc" id="group__uartps_html_ga90a3cb2c33dba6a5b888f7324d1c5135"><div class="ttname"><a href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a></div><div class="ttdeci">#define XUARTPS_CR_OFFSET</div><div class="ttdoc">Control Register [8:0]. </div><div class="ttdef"><b>Definition:</b> xuartps_hw.h:62</div></div>
</div><!-- fragment -->
<p>Set the UART Mode Control Register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance. </td></tr>
    <tr><td class="paramname">RegisterValue</td><td>is the value to be written to the register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: void <a class="el" href="group__uartps.html#gabecf07183bbcaa00778bae5eee856818" title="Set the UART Mode Control Register. ">XUartPs_SetModeControl(XUartPs *InstancePtr, u16 RegisterValue)</a> </dd></dl>

</div>
</div>
<a class="anchor" id="gac592e66801976640af2e3e08b7259d08"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_SR_FLOWDEL&#160;&#160;&#160;0x00001000U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX FIFO fill over flow delay. </p>

</div>
</div>
<a class="anchor" id="ga342083b04c2f9d589d7dcb1d40b329f6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_SR_OFFSET&#160;&#160;&#160;0x002CU</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Channel Status [14:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga4279fd824eea23f74ad66f165cb0265e">XUartPs_IsSending()</a>, and <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>.</p>

</div>
</div>
<a class="anchor" id="ga85bccd08f2770a3f7795db3bfa5dac13"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_SR_RACTIVE&#160;&#160;&#160;0x00000400U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX active. </p>

</div>
</div>
<a class="anchor" id="gad604ae6739b459eb76fd3515d3d4f249"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XUARTPS_SR_RXEMPTY&#160;&#160;&#160;0x00000002U</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX FIFO empty. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>.</p>

</div>
</div>
<a class="anchor" id="ga1871fba85971f549aff226215f9936a5"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XUARTPS_SR_RXFULL&#160;&#160;&#160;0x00000004U</td>
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<p>RX FIFO full. </p>

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          <td class="memname">#define XUARTPS_SR_RXOVR&#160;&#160;&#160;0x00000001U</td>
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<p>RX FIFO fill over trigger. </p>

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<p>TX active. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga4279fd824eea23f74ad66f165cb0265e">XUartPs_IsSending()</a>.</p>

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          <td class="memname">#define XUARTPS_SR_TNFUL&#160;&#160;&#160;0x00004000U</td>
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<p>TX FIFO Nearly Full Status. </p>

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          <td class="memname">#define XUARTPS_SR_TTRIG&#160;&#160;&#160;0x00002000U</td>
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<p>TX FIFO Trigger Status. </p>

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<p>TX FIFO empty. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga4279fd824eea23f74ad66f165cb0265e">XUartPs_IsSending()</a>.</p>

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<p>TX FIFO full. </p>

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          <td class="memname">#define XUARTPS_TXWM_MASK&#160;&#160;&#160;0x0000003FU</td>
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<p>Valid bits mask. </p>

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          <td class="memname">#define XUARTPS_TXWM_OFFSET&#160;&#160;&#160;0x0044U</td>
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<p>TX FIFO Trigger Level [5:0]. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>.</p>

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<p>Reset value. </p>

<p>Referenced by <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>.</p>

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          <td class="memname">#define XUartPs_WriteReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegisterValue&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;Xil_Out32((BaseAddress) + (u32)(RegOffset), (u32)(RegisterValue))</td>
        </tr>
      </table>
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<p>Write a UART register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>contains the base address of the device. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>contains the offset from the base address of the device. </td></tr>
    <tr><td class="paramname">RegisterValue</td><td>is the value to be written to the register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: void XUartPs_WriteReg(u32 BaseAddress, int RegOffset, u16 RegisterValue) </dd></dl>

<p>Referenced by <a class="el" href="xuartps__low__echo__example_8c.html#a012e79e774af8eeb985f9fdfac38de37">UartPsEchoExample()</a>, <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>, <a class="el" href="group__uartps.html#gabf86fb20a58e4a7fbd73afa49f8eb604">XUartPs_InterruptHandler()</a>, <a class="el" href="group__uartps.html#gadc16932076b99cd747e702dcbecd102b">XUartPs_Recv()</a>, <a class="el" href="group__uartps.html#ga157cf5966738452bc13639746f4b8d97">XUartPs_ResetHw()</a>, <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>, <a class="el" href="group__uartps.html#ga17b3e12a296eecf17be4a4b8583576e7">XUartPs_Send()</a>, <a class="el" href="group__uartps.html#ga4bae0ee4df836a8c3e7748c9ae28ebee">XUartPs_SendByte()</a>, <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>, <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>, <a class="el" href="group__uartps.html#ga515c53f7e66c34da6b18cc7529cc69a5">XUartPs_SetFifoThreshold()</a>, <a class="el" href="group__uartps.html#ga0e5c270f7abd4a00f629a638feb2e68e">XUartPs_SetFlowDelay()</a>, <a class="el" href="group__uartps.html#gab3b65e926f6f4ac7ab41a70801ba12c3">XUartPs_SetInterruptMask()</a>, <a class="el" href="group__uartps.html#ga9c84f5324979f1ba3a9f5a866806d0e8">XUartPs_SetOperMode()</a>, <a class="el" href="group__uartps.html#ga6c7c0ef55459866990d4a17fbb620ba6">XUartPs_SetOptions()</a>, and <a class="el" href="group__uartps.html#ga75f0201ac3749384f29171565410a8df">XUartPs_SetRecvTimeout()</a>.</p>

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<h2 class="groupheader">Typedef Documentation</h2>
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<p>This function is the handler which performs processing to handle data events from the device. </p>
<p>It is called from an interrupt context. so the amount of processing should be minimal.</p>
<p>This handler provides an example of how to handle data for the device and is application specific.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallBackRef</td><td>contains a callback reference from the driver, in this case it is the instance pointer for the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> driver. </td></tr>
    <tr><td class="paramname">Event</td><td>contains the specific kind of event that has occurred. </td></tr>
    <tr><td class="paramname">EventData</td><td>contains the number of bytes sent or received for sent and receive events.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

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<p>This data type defines a handler that an application defines to communicate with interrupt system to retrieve state information about an application. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallBackRef</td><td>is a callback reference passed in by the upper layer when setting the handler, and is passed back to the upper layer when the handler is called. It is used to find the device driver instance. </td></tr>
    <tr><td class="paramname">Event</td><td>contains one of the event constants indicating events that have occurred. </td></tr>
    <tr><td class="paramname">EventData</td><td>contains the number of bytes sent or received at the time of the call for send and receive events and contains the modem status for modem events. </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">s32 XUartPs_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps___config.html">XUartPs_Config</a> *&#160;</td>
          <td class="paramname"><em>Config</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Initializes a specific <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance such that it is ready to be used. </p>
<p>The data format of the device is setup for 8 data bits, 1 stop bit, and no parity by default. The baud rate is set to a default value specified by Config-&gt;DefaultBaudRate if set, otherwise it is set to 19.2K baud. The receive FIFO threshold is set for 8 bytes. The default operating mode of the driver is polled mode.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance. </td></tr>
    <tr><td class="paramname">Config</td><td>is a reference to a structure containing information about a specific <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> driver. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, pass in the physical address instead.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><pre class="fragment">    - XST_SUCCESS if initialization was successful
    - XST_UART_BAUD_ERROR if the baud rate is not possible because
      the inputclock frequency is not divisible with an acceptable
      amount of error
</pre></dd></dl>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>The default configuration for the UART after initialization is:</p>
<ul>
<li>19,200 bps or XPAR_DFT_BAUDRATE if defined</li>
<li>8 data bits</li>
<li>1 stop bit</li>
<li>no parity</li>
<li>FIFO's are enabled with a receive threshold of 8 bytes</li>
<li><p class="startli">The RX timeout is enabled with a timeout of 1 (4 char times)</p>
<p class="startli">All interrupts are disabled. </p>
</li>
</ul>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="struct_x_uart_ps___config.html#a5fbaef80b5226862a13b11272d3b2f6c">XUartPs_Config::InputClockHz</a>, <a class="el" href="group__uartps.html#ga7e39d2ae49038a4ce4087bbee2bfdab7">XUARTPS_IDR_OFFSET</a>, <a class="el" href="group__uartps.html#ga73b78b2490f8a0aa402867987c765df0">XUARTPS_IXR_MASK</a>, <a class="el" href="group__uartps.html#ga038e90de6132f4e00b64b0f34ff0dfa7">XUARTPS_MR_CHARLEN_8_BIT</a>, <a class="el" href="group__uartps.html#gae973a7d15eb3f582200a39f3a0444a66">XUARTPS_MR_CHARLEN_MASK</a>, <a class="el" href="group__uartps.html#gad4932468a404b116c0e56b496b906716">XUARTPS_MR_OFFSET</a>, <a class="el" href="group__uartps.html#ga062f61f5b1d33404b4328d15a4010f5c">XUARTPS_MR_PARITY_MASK</a>, <a class="el" href="group__uartps.html#ga708588a4f5ec6e1b8728268dd0d6ba73">XUARTPS_MR_PARITY_NONE</a>, <a class="el" href="group__uartps.html#ga3b4e88eab034a961b86ab592369fb766">XUARTPS_MR_STOPMODE_1_BIT</a>, <a class="el" href="group__uartps.html#gadc83d5b2b747a1d1eac63c5067cf0e88">XUARTPS_MR_STOPMODE_MASK</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, <a class="el" href="group__uartps.html#ga3370f0abee2b4247e3c4aecda1fd63e7">XUARTPS_RXTOUT_OFFSET</a>, <a class="el" href="group__uartps.html#gabc29194aeedab160158a6d44c647224e">XUARTPS_RXWM_OFFSET</a>, <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xuartps__hello__world__example_8c.html#afdf0ae9da6f22566d3ced9ac0140c7dd">UartPsHelloWorldExample()</a>, <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, <a class="el" href="xuartps__polled__example_8c.html#a52331ffc09dfe878421dee5145ce6109">UartPsPolledExample()</a>, and <a class="el" href="xuartps__selftest__example_8c.html#a9f639310e82e24f06015dc935ace075c">UartPsSelfTestExample()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps_format.html">XUartPsFormat</a> *&#160;</td>
          <td class="paramname"><em>FormatPtr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Gets the data format for the specified UART. </p>
<p>The data format includes the baud rate, number of data bits, number of stop bits, and parity.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance. </td></tr>
    <tr><td class="paramname">FormatPtr</td><td>is a pointer to a format structure that will contain the data format after this call completes.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="struct_x_uart_ps_format.html#a267c8cfe489f4bedda2f746bae10091a">XUartPsFormat::BaudRate</a>, <a class="el" href="struct_x_uart_ps_format.html#a965929f6a567dffcbce97adba720ab60">XUartPsFormat::DataBits</a>, <a class="el" href="struct_x_uart_ps_format.html#a11981131b499be00644cffadf1e8eadc">XUartPsFormat::Parity</a>, <a class="el" href="struct_x_uart_ps_format.html#a79b08626f18007181dbc8a6e99ce0d64">XUartPsFormat::StopBits</a>, <a class="el" href="group__uartps.html#gae973a7d15eb3f582200a39f3a0444a66">XUARTPS_MR_CHARLEN_MASK</a>, <a class="el" href="group__uartps.html#ga486e6d26bf3570c2f14cdbae2c246648">XUARTPS_MR_CHARLEN_SHIFT</a>, <a class="el" href="group__uartps.html#gad4932468a404b116c0e56b496b906716">XUARTPS_MR_OFFSET</a>, <a class="el" href="group__uartps.html#ga062f61f5b1d33404b4328d15a4010f5c">XUARTPS_MR_PARITY_MASK</a>, <a class="el" href="group__uartps.html#ga81a8d9730a5ec55902869c011d07433e">XUARTPS_MR_PARITY_SHIFT</a>, <a class="el" href="group__uartps.html#gadc83d5b2b747a1d1eac63c5067cf0e88">XUARTPS_MR_STOPMODE_MASK</a>, <a class="el" href="group__uartps.html#ga26f962080857bd73db4cd09de29d1140">XUARTPS_MR_STOPMODE_SHIFT</a>, and <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function gets the receive FIFO trigger level. </p>
<p>The receive trigger level indicates the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The current receive FIFO trigger level. This is a value from 0-31.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, <a class="el" href="group__uartps.html#ga0b1b76b99179a02db9e22d6c290765fd">XUARTPS_RXWM_MASK</a>, and <a class="el" href="group__uartps.html#gabc29194aeedab160158a6d44c647224e">XUARTPS_RXWM_OFFSET</a>.</p>

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          <td class="memname">u8 XUartPs_GetFlowDelay </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function sets the Flow Delay. </p>
<p>0 - 3: Flow delay inactive 4 - 32: If Flow Control mode is enabled, UART_rtsN is deactivated when the receive FIFO fills to this level.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<p>The Flow Delay is specified by constants defined in <a class="el" href="xuartps__hw_8h.html">xuartps_hw.h</a>. The constants are named XUARTPS_FLOWDEL*</p>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga6b7df91642929dda91d4098ed126134c">XUARTPS_FLOWDEL_MASK</a>, <a class="el" href="group__uartps.html#ga7d02d59e19b92baf8fa69dc24833f8a2">XUARTPS_FLOWDEL_OFFSET</a>, and <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function gets the interrupt mask. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The current interrupt mask. The mask indicates which interrupts are enabled.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga0cfdb73d2795d7cc3b849fe1622fa029">XUARTPS_IMR_OFFSET</a>, and <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function gets the modem status from the specified UART. </p>
<p>The modem status indicates any changes of the modem signals. This function allows the modem status to be read in a polled mode. The modem status is updated whenever it is read such that reading it twice may not yield the same results.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<p>The modem status which are bit masks that are contained in the file <a class="el" href="xuartps_8h.html">xuartps.h</a> and named XUARTPS_MODEM_*.</p>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>The bit masks used for the modem status are the exact bits of the modem status register with no abstraction. </p>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga36a307fcdb77eba28c8029f92d4db1b9">XUARTPS_MODEMSR_OFFSET</a>, and <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>.</p>

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          <td class="memname">u8 XUartPs_GetOperMode </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function gets the operational mode of the UART. </p>
<p>The UART can operate in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic echo.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<p>The operational mode is specified by constants defined in <a class="el" href="xuartps_8h.html">xuartps.h</a>. The constants are named XUARTPS_OPER_MODE_*</p>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga23f5cd17565cb514d2cb651a84b0bd71">XUARTPS_MR_CHMODE_ECHO</a>, <a class="el" href="group__uartps.html#ga0a3141d2830527a27bf715a0b286936e">XUARTPS_MR_CHMODE_L_LOOP</a>, <a class="el" href="group__uartps.html#ga3097ef040f183de6a8ba8b4cedf64ccf">XUARTPS_MR_CHMODE_MASK</a>, <a class="el" href="group__uartps.html#gab9c582f58d3628334fa95502f7532c81">XUARTPS_MR_CHMODE_NORM</a>, <a class="el" href="group__uartps.html#gadbf78ca00f2906f2b1334c1daa9e8688">XUARTPS_MR_CHMODE_R_LOOP</a>, <a class="el" href="group__uartps.html#ga5ed18906d4a19e7f047705902342e758">XUARTPS_MR_CHMODE_SHIFT</a>, <a class="el" href="group__uartps.html#gad4932468a404b116c0e56b496b906716">XUARTPS_MR_OFFSET</a>, <a class="el" href="group__uartps.html#ga59bf55affd72ca3bd5824c921926527b">XUARTPS_OPER_MODE_AUTO_ECHO</a>, <a class="el" href="group__uartps.html#ga3a71908d40b06c097599a5a29d61e800">XUARTPS_OPER_MODE_LOCAL_LOOP</a>, <a class="el" href="group__uartps.html#ga9d916026363230478a8c8729e23f3352">XUARTPS_OPER_MODE_NORMAL</a>, <a class="el" href="group__uartps.html#ga5e25847001737185c8359cda12524e35">XUARTPS_OPER_MODE_REMOTE_LOOP</a>, and <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>Gets the options for the specified driver instance. </p>
<p>The options are implemented as bit masks such that multiple options may be enabled or disabled simultaneously.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<p>The current options for the UART. The options are bit masks that are contained in the file <a class="el" href="xuartps_8h.html">xuartps.h</a> and named XUARTPS_OPTION_*.</p>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, and <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function gets the Receive Timeout of the UART. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The current setting for receive time out.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, <a class="el" href="group__uartps.html#ga391ed6bbae78f486a638f48f539f7755">XUARTPS_RXTOUT_MASK</a>, and <a class="el" href="group__uartps.html#ga3370f0abee2b4247e3c4aecda1fd63e7">XUARTPS_RXTOUT_OFFSET</a>.</p>

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          <td class="memname">void XUartPs_InterruptHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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      </table>
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<p>This function is the interrupt handler for the driver. </p>
<p>It must be connected to an interrupt system by the application such that it can be called when an interrupt occurs.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>contains a pointer to the driver instance</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga0cfdb73d2795d7cc3b849fe1622fa029">XUARTPS_IMR_OFFSET</a>, <a class="el" href="group__uartps.html#ga7e96d23606d96a7d9816bc2ff777cbf8">XUARTPS_ISR_OFFSET</a>, <a class="el" href="group__uartps.html#gadf1dabb7547f5b16748e8c6307cfc7a1">XUARTPS_IXR_DMS</a>, <a class="el" href="group__uartps.html#gaa6048212fde48f7188efd90c83c4822d">XUARTPS_IXR_FRAMING</a>, <a class="el" href="group__uartps.html#gafd4a37077bddeeefcc39d58b4f08fb23">XUARTPS_IXR_OVER</a>, <a class="el" href="group__uartps.html#ga2a11620ed0dd465adf0de24f6d7ad418">XUARTPS_IXR_PARITY</a>, <a class="el" href="group__uartps.html#gab5df3d1fd00008bd7cc177abd02f07e5">XUARTPS_IXR_RBRK</a>, <a class="el" href="group__uartps.html#ga541b132695e333571fd8c6b2eeaa23bd">XUARTPS_IXR_RXEMPTY</a>, <a class="el" href="group__uartps.html#gae374cc3c085d3cac795d95b657b03d5e">XUARTPS_IXR_RXFULL</a>, <a class="el" href="group__uartps.html#gaad5de1c646049d7ced8841e316a34892">XUARTPS_IXR_RXOVR</a>, <a class="el" href="group__uartps.html#ga7194f5e99a1a98178f6bf1462791aaac">XUARTPS_IXR_TOUT</a>, <a class="el" href="group__uartps.html#ga9a4207349f3980046ba4ea9e4379007a">XUARTPS_IXR_TXEMPTY</a>, <a class="el" href="group__uartps.html#ga9abc091be0a0e2cc18bbc540db6e513b">XUARTPS_IXR_TXFULL</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>.</p>

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          <td class="memname">u32 XUartPs_IsSending </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function determines if the specified UART is sending data. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE if the UART is sending data</li>
<li>FALSE if UART is not sending data</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, <a class="el" href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a>, <a class="el" href="group__uartps.html#ga5032d2efd70379e4c525816c0f75c724">XUARTPS_SR_TACTIVE</a>, and <a class="el" href="group__uartps.html#ga4eb9c1b9ceaf7aecb36d43c983edbe95">XUARTPS_SR_TXEMPTY</a>.</p>

<p>Referenced by <a class="el" href="xuartps__polled__example_8c.html#a52331ffc09dfe878421dee5145ce6109">UartPsPolledExample()</a>.</p>

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          <td class="memname"><a class="el" href="struct_x_uart_ps___config.html">XUartPs_Config</a> * XUartPs_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
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<p>Looks up the device configuration based on the unique device ID. </p>
<p>The table contains the configuration info for each device in the system.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>contains the ID of the device</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>A pointer to the configuration structure or NULL if the specified device is not in the system.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xuartps__hello__world__example_8c.html#afdf0ae9da6f22566d3ced9ac0140c7dd">UartPsHelloWorldExample()</a>, <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, <a class="el" href="xuartps__polled__example_8c.html#a52331ffc09dfe878421dee5145ce6109">UartPsPolledExample()</a>, and <a class="el" href="xuartps__selftest__example_8c.html#a9f639310e82e24f06015dc935ace075c">UartPsSelfTestExample()</a>.</p>

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          <td class="memname">u32 XUartPs_Recv </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>BufferPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>NumBytes</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>This function attempts to receive a specified number of bytes of data from the device and store it into the specified buffer. </p>
<p>This function works for both polled or interrupt driven modes. It is non-blocking.</p>
<p>In a polled mode, this function will only receive the data already in the RX FIFO. The application may need to call it repeatedly to receive the entire buffer. Polled mode is the default mode of operation for the device.</p>
<p>In interrupt mode, this function will start the receiving, if not the entire buffer has been received, the interrupt handler will continue receiving data until the entire buffer has been received. A callback function, as specified by the application, will be called to indicate the completion of the receiving or error conditions.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance </td></tr>
    <tr><td class="paramname">BufferPtr</td><td>is pointer to buffer for data to be received into </td></tr>
    <tr><td class="paramname">NumBytes</td><td>is the number of bytes to be received. A value of zero will stop a previous receive operation that is in progress in interrupt mode.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The number of bytes received.</dd></dl>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress. </p>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga7e39d2ae49038a4ce4087bbee2bfdab7">XUARTPS_IDR_OFFSET</a>, <a class="el" href="group__uartps.html#ga50985f0d8e60110fbbc63b1e100beb68">XUARTPS_IER_OFFSET</a>, <a class="el" href="group__uartps.html#ga0cfdb73d2795d7cc3b849fe1622fa029">XUARTPS_IMR_OFFSET</a>, <a class="el" href="group__uartps.html#ga73b78b2490f8a0aa402867987c765df0">XUARTPS_IXR_MASK</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, <a class="el" href="xuartps__polled__example_8c.html#a52331ffc09dfe878421dee5145ce6109">UartPsPolledExample()</a>, and <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>.</p>

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          <td>(</td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BaseAddress</em></td><td>)</td>
          <td></td>
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<p>This function receives a byte from the device. </p>
<p>It operates in polled mode and blocks until a byte has received.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>contains the base address of the device.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The data byte received.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__uartps.html#ga12e256a5c0dd76b4c3ce5952382a0400">XUARTPS_FIFO_OFFSET</a>, <a class="el" href="group__uartps.html#gac8b8f06d10cf178227ce88c140d78eb4">XUartPs_IsReceiveData</a>, and <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>.</p>

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          <td class="memname">void XUartPs_ResetHw </td>
          <td>(</td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BaseAddress</em></td><td>)</td>
          <td></td>
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<p>This function resets UART. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>contains the base address of the device.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__uartps.html#ga18d29d65e26d6c7c192464dbf88aeb55">XUARTPS_BAUDDIV_OFFSET</a>, <a class="el" href="group__uartps.html#gaae81b813494b51dffc97f265ccc8bc1b">XUARTPS_BAUDDIV_RESET_VAL</a>, <a class="el" href="group__uartps.html#ga77bb5a0dfa2f1e62cf75c0972e889e92">XUARTPS_BAUDGEN_OFFSET</a>, <a class="el" href="group__uartps.html#ga0df74dbc1f99f853eac534c58465c67c">XUARTPS_BAUDGEN_RESET_VAL</a>, <a class="el" href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a>, <a class="el" href="group__uartps.html#gaffa7bb80501ee66683ce853436190ea9">XUARTPS_CR_RX_DIS</a>, <a class="el" href="group__uartps.html#ga659be76f18f938134bbe4e8c0e26159b">XUARTPS_CR_RXRST</a>, <a class="el" href="group__uartps.html#ga997014ffed40da258769e496544cad9f">XUARTPS_CR_STOPBRK</a>, <a class="el" href="group__uartps.html#ga4831dbafe987c3286b022f3ab937bc9a">XUARTPS_CR_TX_DIS</a>, <a class="el" href="group__uartps.html#ga1859f5cbbdbf0a83eff49960ccc342e2">XUARTPS_CR_TXRST</a>, <a class="el" href="group__uartps.html#ga7e39d2ae49038a4ce4087bbee2bfdab7">XUARTPS_IDR_OFFSET</a>, <a class="el" href="group__uartps.html#ga7e96d23606d96a7d9816bc2ff777cbf8">XUARTPS_ISR_OFFSET</a>, <a class="el" href="group__uartps.html#ga73b78b2490f8a0aa402867987c765df0">XUARTPS_IXR_MASK</a>, <a class="el" href="group__uartps.html#gab9c582f58d3628334fa95502f7532c81">XUARTPS_MR_CHMODE_NORM</a>, <a class="el" href="group__uartps.html#gad4932468a404b116c0e56b496b906716">XUARTPS_MR_OFFSET</a>, <a class="el" href="group__uartps.html#ga9940f0728fcd584c7805eed12531539e">XUARTPS_RXTOUT_DISABLE</a>, <a class="el" href="group__uartps.html#ga3370f0abee2b4247e3c4aecda1fd63e7">XUARTPS_RXTOUT_OFFSET</a>, <a class="el" href="group__uartps.html#gabc29194aeedab160158a6d44c647224e">XUARTPS_RXWM_OFFSET</a>, <a class="el" href="group__uartps.html#gabf1d0d57b5ac837fc55dd128383dcafa">XUARTPS_RXWM_RESET_VAL</a>, <a class="el" href="group__uartps.html#ga3a498a8321302dae35403f698056058d">XUARTPS_TXWM_OFFSET</a>, <a class="el" href="group__uartps.html#gacd020d8ceafb59c1deffa8ad5b2f859e">XUARTPS_TXWM_RESET_VAL</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

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          <td class="memname">s32 XUartPs_SelfTest </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function runs a self-test on the driver and hardware device. </p>
<p>This self test performs a local loopback and verifies data can be sent and received.</p>
<p>The time for this test is proportional to the baud rate that has been set prior to calling this function.</p>
<p>The mode and control registers are restored before return.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the test was successful</li>
</ul>
</dd></dl>
<ul>
<li>XST_UART_TEST_FAIL if the test failed looping back the data</li>
</ul>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>This function can hang if the hardware is not functioning properly. </p>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga2f0a6417e12aa122e287fe313c03a399">TIMEOUT_VAL</a>, <a class="el" href="group__uartps.html#ga7e39d2ae49038a4ce4087bbee2bfdab7">XUARTPS_IDR_OFFSET</a>, <a class="el" href="group__uartps.html#ga50985f0d8e60110fbbc63b1e100beb68">XUARTPS_IER_OFFSET</a>, <a class="el" href="group__uartps.html#ga0cfdb73d2795d7cc3b849fe1622fa029">XUARTPS_IMR_OFFSET</a>, <a class="el" href="group__uartps.html#ga73b78b2490f8a0aa402867987c765df0">XUARTPS_IXR_MASK</a>, <a class="el" href="group__uartps.html#ga0a3141d2830527a27bf715a0b286936e">XUARTPS_MR_CHMODE_L_LOOP</a>, <a class="el" href="group__uartps.html#ga3097ef040f183de6a8ba8b4cedf64ccf">XUARTPS_MR_CHMODE_MASK</a>, <a class="el" href="group__uartps.html#gad4932468a404b116c0e56b496b906716">XUARTPS_MR_OFFSET</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, <a class="el" href="group__uartps.html#gadc16932076b99cd747e702dcbecd102b">XUartPs_Recv()</a>, <a class="el" href="group__uartps.html#ga17b3e12a296eecf17be4a4b8583576e7">XUartPs_Send()</a>, <a class="el" href="group__uartps.html#ga342083b04c2f9d589d7dcb1d40b329f6">XUARTPS_SR_OFFSET</a>, <a class="el" href="group__uartps.html#gad604ae6739b459eb76fd3515d3d4f249">XUARTPS_SR_RXEMPTY</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, <a class="el" href="xuartps__polled__example_8c.html#a52331ffc09dfe878421dee5145ce6109">UartPsPolledExample()</a>, and <a class="el" href="xuartps__selftest__example_8c.html#a9f639310e82e24f06015dc935ace075c">UartPsSelfTestExample()</a>.</p>

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          <td class="memname">u32 XUartPs_Send </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>BufferPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>NumBytes</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>This functions sends the specified buffer using the device in either polled or interrupt driven mode. </p>
<p>This function is non-blocking, if the device is busy sending data, it will return and indicate zero bytes were sent. Otherwise, it fills the TX FIFO as much as it can, and return the number of bytes sent.</p>
<p>In a polled mode, this function will only send as much data as TX FIFO can buffer. The application may need to call it repeatedly to send the entire buffer.</p>
<p>In interrupt mode, this function will start sending the specified buffer, then the interrupt handler will continue sending data until the entire buffer has been sent. A callback function, as specified by the application, will be called to indicate the completion of sending.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance. </td></tr>
    <tr><td class="paramname">BufferPtr</td><td>is pointer to a buffer of data to be sent. </td></tr>
    <tr><td class="paramname">NumBytes</td><td>contains the number of bytes to be sent. A value of zero will stop a previous send operation that is in progress in interrupt mode. Any data that was already put into the transmit FIFO will be sent.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The number of bytes actually sent.</dd></dl>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>The number of bytes is not asserted so that this function may be called with a value of zero to stop an operation that is already in progress. <br/>
<br/>
 </p>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga7e39d2ae49038a4ce4087bbee2bfdab7">XUARTPS_IDR_OFFSET</a>, <a class="el" href="group__uartps.html#ga9a4207349f3980046ba4ea9e4379007a">XUARTPS_IXR_TXEMPTY</a>, <a class="el" href="group__uartps.html#ga9abc091be0a0e2cc18bbc540db6e513b">XUARTPS_IXR_TXFULL</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xuartps__hello__world__example_8c.html#afdf0ae9da6f22566d3ced9ac0140c7dd">UartPsHelloWorldExample()</a>, <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, <a class="el" href="xuartps__polled__example_8c.html#a52331ffc09dfe878421dee5145ce6109">UartPsPolledExample()</a>, and <a class="el" href="group__uartps.html#ga64e7142d1c69e2e29c9e323c4497baaf">XUartPs_SelfTest()</a>.</p>

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          <td class="memname">void XUartPs_SendByte </td>
          <td>(</td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BaseAddress</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Data</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>This function sends one byte using the device. </p>
<p>This function operates in polled mode and blocks until the data has been put into the TX FIFO register.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>contains the base address of the device. </td></tr>
    <tr><td class="paramname">Data</td><td>contains the byte to be sent.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__uartps.html#ga12e256a5c0dd76b4c3ce5952382a0400">XUARTPS_FIFO_OFFSET</a>, <a class="el" href="group__uartps.html#gaf1507e8d7b12983484a0ab5436a51970">XUartPs_IsTransmitFull</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

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          <td class="memname">s32 XUartPs_SetBaudRate </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BaudRate</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Sets the baud rate for the device. </p>
<p>Checks the input value for validity and also verifies that the requested rate can be configured to within the maximum error range specified by XUARTPS_MAX_BAUD_ERROR_RATE. If the provided rate is not possible, the current setting is unchanged.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance </td></tr>
    <tr><td class="paramname">BaudRate</td><td>to be set</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if everything configured as expected</li>
<li>XST_UART_BAUD_ERROR if the requested rate is not available because there was too much error</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="struct_x_uart_ps___config.html#a5fbaef80b5226862a13b11272d3b2f6c">XUartPs_Config::InputClockHz</a>, <a class="el" href="group__uartps.html#ga18d29d65e26d6c7c192464dbf88aeb55">XUARTPS_BAUDDIV_OFFSET</a>, <a class="el" href="group__uartps.html#ga77bb5a0dfa2f1e62cf75c0972e889e92">XUARTPS_BAUDGEN_OFFSET</a>, <a class="el" href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a>, <a class="el" href="group__uartps.html#ga659be76f18f938134bbe4e8c0e26159b">XUARTPS_CR_RXRST</a>, <a class="el" href="group__uartps.html#ga1859f5cbbdbf0a83eff49960ccc342e2">XUARTPS_CR_TXRST</a>, <a class="el" href="group__uartps.html#gaa8604eeb6cd5c80a3a54ef5510bd46ff">XUartPs_DisableUart</a>, <a class="el" href="group__uartps.html#ga800f448c280504c1c8e3a0e2cea28699">XUartPs_EnableUart</a>, <a class="el" href="group__uartps.html#gac383c8056146a93a6113ce9a05501ffd">XUARTPS_MR_CLKSEL</a>, <a class="el" href="group__uartps.html#gad4932468a404b116c0e56b496b906716">XUARTPS_MR_OFFSET</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xuartps__hello__world__example_8c.html#afdf0ae9da6f22566d3ced9ac0140c7dd">UartPsHelloWorldExample()</a>, <a class="el" href="group__uartps.html#ga371d525c4d48239a3ce77c44d0a92b05">XUartPs_CfgInitialize()</a>, and <a class="el" href="group__uartps.html#ga249eaf3cd4be5242d4143a88bab1add0">XUartPs_SetDataFormat()</a>.</p>

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          <td class="memname">s32 XUartPs_SetDataFormat </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps_format.html">XUartPsFormat</a> *&#160;</td>
          <td class="paramname"><em>FormatPtr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>Sets the data format for the device. </p>
<p>The data format includes the baud rate, number of data bits, number of stop bits, and parity. It is the caller's responsibility to ensure that the UART is not sending or receiving data when this function is called.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance. </td></tr>
    <tr><td class="paramname">FormatPtr</td><td>is a pointer to a format structure containing the data format to be set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the data format was successfully set.</li>
<li>XST_UART_BAUD_ERROR indicates the baud rate could not be set because of the amount of error with the baud rate and the input clock frequency.</li>
<li>XST_INVALID_PARAM if one of the parameters was not valid.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>The data types in the format type, data bits and parity, are 32 bit fields to prevent a compiler warning. The asserts in this function will cause a warning if these fields are bytes. <br/>
<br/>
 </p>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="struct_x_uart_ps_format.html#a267c8cfe489f4bedda2f746bae10091a">XUartPsFormat::BaudRate</a>, <a class="el" href="struct_x_uart_ps_format.html#a965929f6a567dffcbce97adba720ab60">XUartPsFormat::DataBits</a>, <a class="el" href="struct_x_uart_ps_format.html#a11981131b499be00644cffadf1e8eadc">XUartPsFormat::Parity</a>, <a class="el" href="struct_x_uart_ps_format.html#a79b08626f18007181dbc8a6e99ce0d64">XUartPsFormat::StopBits</a>, <a class="el" href="group__uartps.html#ga835065749aec4b9f48a3f2ddbc7e611e">XUARTPS_FORMAT_2_STOP_BIT</a>, <a class="el" href="group__uartps.html#ga18409691f005bcf4524c5d5b4eef8bc9">XUARTPS_FORMAT_6_BITS</a>, <a class="el" href="group__uartps.html#gadacbaf7f47beeebb7301b6d50b74f6c1">XUARTPS_FORMAT_NO_PARITY</a>, <a class="el" href="group__uartps.html#gae973a7d15eb3f582200a39f3a0444a66">XUARTPS_MR_CHARLEN_MASK</a>, <a class="el" href="group__uartps.html#ga486e6d26bf3570c2f14cdbae2c246648">XUARTPS_MR_CHARLEN_SHIFT</a>, <a class="el" href="group__uartps.html#gad4932468a404b116c0e56b496b906716">XUARTPS_MR_OFFSET</a>, <a class="el" href="group__uartps.html#ga062f61f5b1d33404b4328d15a4010f5c">XUARTPS_MR_PARITY_MASK</a>, <a class="el" href="group__uartps.html#ga81a8d9730a5ec55902869c011d07433e">XUARTPS_MR_PARITY_SHIFT</a>, <a class="el" href="group__uartps.html#gadc83d5b2b747a1d1eac63c5067cf0e88">XUARTPS_MR_STOPMODE_MASK</a>, <a class="el" href="group__uartps.html#ga26f962080857bd73db4cd09de29d1140">XUARTPS_MR_STOPMODE_SHIFT</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, <a class="el" href="group__uartps.html#ga9d94f913e0494b532c9f442e1bb14dcc">XUartPs_SetBaudRate()</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

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          <td class="memname">void XUartPs_SetFifoThreshold </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>TriggerLevel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This functions sets the receive FIFO trigger level. </p>
<p>The receive trigger level specifies the number of bytes in the receive FIFO that cause a receive data event (interrupt) to be generated.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance. </td></tr>
    <tr><td class="paramname">TriggerLevel</td><td>contains the trigger level to set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga0b1b76b99179a02db9e22d6c290765fd">XUARTPS_RXWM_MASK</a>, <a class="el" href="group__uartps.html#gabc29194aeedab160158a6d44c647224e">XUARTPS_RXWM_OFFSET</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

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          <td class="memname">void XUartPs_SetFlowDelay </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>FlowDelayValue</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>This function sets the Flow Delay. </p>
<p>0 - 3: Flow delay inactive 4 - 63: If Flow Control mode is enabled, UART_rtsN is deactivated when the receive FIFO fills to this level.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance. </td></tr>
    <tr><td class="paramname">FlowDelayValue</td><td>is the Setting for the flow delay.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga6b7df91642929dda91d4098ed126134c">XUARTPS_FLOWDEL_MASK</a>, <a class="el" href="group__uartps.html#ga7d02d59e19b92baf8fa69dc24833f8a2">XUARTPS_FLOWDEL_OFFSET</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

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          <td class="memname">void XUartPs_SetHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__uartps.html#ga5bb8d1f316dacd471a6cd3c976c7b1ca">XUartPs_Handler</a>&#160;</td>
          <td class="paramname"><em>FuncPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallBackRef</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the handler that will be called when an event (interrupt) occurs that needs application's attention. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance </td></tr>
    <tr><td class="paramname">FuncPtr</td><td>is the pointer to the callback function. </td></tr>
    <tr><td class="paramname">CallBackRef</td><td>is the upper layer callback reference passed back when the callback function is invoked.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>There is no assert on the CallBackRef since the driver doesn't know what it is (nor should it) </p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>.</p>

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          <td class="memname">void XUartPs_SetInterruptMask </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the interrupt mask. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance </td></tr>
    <tr><td class="paramname">Mask</td><td>contains the interrupts to be enabled or disabled. A '1' enables an interrupt, and a '0' disables.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga7e39d2ae49038a4ce4087bbee2bfdab7">XUARTPS_IDR_OFFSET</a>, <a class="el" href="group__uartps.html#ga50985f0d8e60110fbbc63b1e100beb68">XUARTPS_IER_OFFSET</a>, <a class="el" href="group__uartps.html#ga73b78b2490f8a0aa402867987c765df0">XUARTPS_IXR_MASK</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>.</p>

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          <td class="memname">void XUartPs_SetOperMode </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>OperationMode</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the operational mode of the UART. </p>
<p>The UART can operate in one of four modes: Normal, Local Loopback, Remote Loopback, or automatic echo.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance. </td></tr>
    <tr><td class="paramname">OperationMode</td><td>is the mode of the UART.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga23f5cd17565cb514d2cb651a84b0bd71">XUARTPS_MR_CHMODE_ECHO</a>, <a class="el" href="group__uartps.html#ga0a3141d2830527a27bf715a0b286936e">XUARTPS_MR_CHMODE_L_LOOP</a>, <a class="el" href="group__uartps.html#ga3097ef040f183de6a8ba8b4cedf64ccf">XUARTPS_MR_CHMODE_MASK</a>, <a class="el" href="group__uartps.html#gab9c582f58d3628334fa95502f7532c81">XUARTPS_MR_CHMODE_NORM</a>, <a class="el" href="group__uartps.html#gadbf78ca00f2906f2b1334c1daa9e8688">XUARTPS_MR_CHMODE_R_LOOP</a>, <a class="el" href="group__uartps.html#gad4932468a404b116c0e56b496b906716">XUARTPS_MR_OFFSET</a>, <a class="el" href="group__uartps.html#ga59bf55affd72ca3bd5824c921926527b">XUARTPS_OPER_MODE_AUTO_ECHO</a>, <a class="el" href="group__uartps.html#ga3a71908d40b06c097599a5a29d61e800">XUARTPS_OPER_MODE_LOCAL_LOOP</a>, <a class="el" href="group__uartps.html#ga9d916026363230478a8c8729e23f3352">XUARTPS_OPER_MODE_NORMAL</a>, <a class="el" href="group__uartps.html#ga5e25847001737185c8359cda12524e35">XUARTPS_OPER_MODE_REMOTE_LOOP</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>, and <a class="el" href="xuartps__polled__example_8c.html#a52331ffc09dfe878421dee5145ce6109">UartPsPolledExample()</a>.</p>

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          <td class="memname">void XUartPs_SetOptions </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Options</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Sets the options for the specified driver instance. </p>
<p>The options are implemented as bit masks such that multiple options may be enabled or disabled simultaneously.</p>
<p>The GetOptions function may be called to retrieve the currently enabled options. The result is ORed in the desired new settings to be enabled and ANDed with the inverse to clear the settings to be disabled. The resulting value is then used as the options for the SetOption function call.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance. </td></tr>
    <tr><td class="paramname">Options</td><td>contains the options to be set which are bit masks contained in the file <a class="el" href="xuartps_8h.html">xuartps.h</a> and named XUARTPS_OPTION_*.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga997014ffed40da258769e496544cad9f">XUARTPS_CR_STOPBRK</a>, <a class="el" href="group__uartps.html#ga5073a0aa7bef53cb44206fa6146b9a86">XUARTPS_OPTION_SET_BREAK</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

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          <td class="memname">void XUartPs_SetRecvTimeout </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_uart_ps.html">XUartPs</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>RecvTimeout</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the Receive Timeout of the UART. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> instance. </td></tr>
    <tr><td class="paramname">RecvTimeout</td><td>setting allows the UART to detect an idle connection on the receiver data line. Timeout duration = RecvTimeout x 4 x Bit Period. 0 disables the timeout function.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_uart_ps___config.html#ae84ddc1aadabf71057f148681630fa40">XUartPs_Config::BaseAddress</a>, <a class="el" href="group__uartps.html#ga90a3cb2c33dba6a5b888f7324d1c5135">XUARTPS_CR_OFFSET</a>, <a class="el" href="group__uartps.html#ga3fbd9a70a2d90299418dd9b5a16b94d9">XUARTPS_CR_TORST</a>, <a class="el" href="group__uartps.html#ga16be7534dc3d678f8abcfeb87e6a4f7e">XUartPs_ReadReg</a>, <a class="el" href="group__uartps.html#ga391ed6bbae78f486a638f48f539f7755">XUARTPS_RXTOUT_MASK</a>, <a class="el" href="group__uartps.html#ga3370f0abee2b4247e3c4aecda1fd63e7">XUARTPS_RXTOUT_OFFSET</a>, and <a class="el" href="group__uartps.html#gab541297d822b163193a2e47305987ab6">XUartPs_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xuartps__intr__example_8c.html#aee2cb1d1ffc3c0fdb4ca1c8a07a3f65c">UartPsIntrExample()</a>.</p>

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          <td class="memname">void XUartPs_WaitTransmitDone </td>
          <td>(</td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BaseAddress</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function waits for transmission to complete. </p>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__uartps.html#gaa34f1217cdc0b14977fbe3a22ec167ee">XUartPs_IsTransmitActive</a>, and <a class="el" href="group__uartps.html#ga8170a2befa118c8bd2ccc108163c4b7a">XUartPs_IsTransmitFifoEmpty</a>.</p>

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<h2 class="groupheader">Variable Documentation</h2>
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          <td class="memname"><a class="el" href="struct_x_uart_ps___config.html">XUartPs_Config</a> XUartPs_ConfigTable[XPAR_XUARTPS_NUM_INSTANCES]</td>
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<p>Each <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> device in the system has an entry in this table. </p>

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          <td class="memname"><a class="el" href="struct_x_uart_ps___config.html">XUartPs_Config</a> XUartPs_ConfigTable[XPAR_XUARTPS_NUM_INSTANCES]</td>
        </tr>
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<b>Initial value:</b><div class="fragment"><div class="line">= {</div>
<div class="line">        {</div>
<div class="line">                (u16)XPAR_XUARTPS_0_DEVICE_ID,</div>
<div class="line">                (u32)XPAR_XUARTPS_0_BASEADDR,</div>
<div class="line">                (u32)XPAR_XUARTPS_0_UART_CLK_FREQ_HZ,</div>
<div class="line">                (s32)0</div>
<div class="line">        },</div>
<div class="line"></div>
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<div class="line"></div>
<div class="line"></div>
<div class="line"></div>
<div class="line"></div>
<div class="line"></div>
<div class="line">}</div>
</div><!-- fragment -->
<p>Each <a class="el" href="struct_x_uart_ps.html" title="The XUartPs driver instance data structure. ">XUartPs</a> device in the system has an entry in this table. </p>

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